News – Page 2282 – EEJournal

Powerful USB Digital Pattern Generators Shorten Time-to-Market

January 21, 2011

Pittsford, NY, USA: Saelig Company, Inc. (Saelig) (www.saelig.com) has introduced the GP-24116 and GP-24132, which combine a high-speed digital pattern generator, logic analyzer and bi-directional protocol (SPI/I²C) host adapter with either 16MB or 32MB of internal memory. GP-241xx devices offer high-speed programmable bidirectional interfaces that allow the stimulation and analysis of digital electronic systems and ICs, providing flexible and powerful access to electronic devices under test. </ … Read More → "Powerful USB Digital Pattern Generators Shorten Time-to-Market"

Spreadtrum Standardizes on Cadence Design Flow and Achieves One-Pass Silicon Realization for Its First 40nm Product

January 21, 2011

SHANGHAI, Jan. 20, 2011 – Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Spreadtrum Communications (NASDAQ: SPRD), a leading provider of baseband and RF processor solutions for the wireless communications market headquartered in Shanghai, migrated to the Cadence® Silicon Realization flow and successfully taped out its first 40-nanometer low-power chip. The chip, a GSM/GPRS/EDGE/TD-SCDMA/HSPA mobile phone baseband, was taped out with one-pass silicon success.

Read More → "Spreadtrum Standardizes on Cadence Design Flow and Achieves One-Pass Silicon Realization for Its First 40nm Product"

congatec unveils new COM Express Basic Module with AMD Fusion Technology

January 20, 2011

Taiwan Embedded Forum, 19 January 2011 * * * congatec AG, a leading manufacturer of embedded computer modules, introduces a new COM Express product line based on the AMD Embedded G-Series platform. The integration of AMD Fusion technology expands the COM Express standard with a completely new processor architecture that combines processors and graphics cores in a compact package. System designers benefit from a powerful CPU and an even more powerful graphics performance, excellent performance-per-watt ratio and flexible task allocation on the CPU and GPU.

Tanner EDA and TowerJazz Announce Qualified Process Design Kit and Reference Flow for 0.18um Power Management Process

January 20, 2011

MONROVIA and NEWPORT BEACH, Calif. – EMBARGOED UNTIL January 19, 2011 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), and TowerJazz, the global specialty foundry leader, have completed qualification of Tanner EDA’s process design kit (PDK) for TowerJazz’s 0.18um Power Management process. This design kit includes symbol libraries for Tanner EDA’s S-Edit schematic capture software as well as parameterised layout generators for its … Read More → "Tanner EDA and TowerJazz Announce Qualified Process Design Kit and Reference Flow for 0.18um Power Management Process"

First IP provider to deliver PLL products on new 28nm low power Common Platform process

January 20, 2011

Mountain View, CA Jan. 17, 2011 Analog Bits, the market leader in low power, customizable mixed-signal IP, today announced availability of a full design kit for their PLL IP products, supporting the 28nm Common Platform process of IBM, Samsung and GLOBAL FOUNDRIES. This “zero core area” PLL has been ported to and will be tested on the 28nm Common Platform process.

Mark Ireland, Vice President, Semiconductor Products and Services at IBM, on behalf of the Common Platform … Read More → "First IP provider to deliver PLL products on new 28nm low power Common Platform process"

NextOp Software Selects Verific Design Automation SystemVerilog

January 20, 2011

ALAMEDA, CALIF. –– January 20, 2011 –– Verific Design Automation today said that NextOp Software, Inc. has licensed its software for use with the NextOp assertion-based verification solutions that allow design and verification teams to uncover bugs, expose functional coverage holes, and increase verification observability.

NextOp Software tightly integrated Verific’s SystemVerilog parser and static and register transfer level (RTL) elaborators with BugScope assertion synthesis, a tool that synthesizes high-quality assertions and functional coverage properties … Read More → "NextOp Software Selects Verific Design Automation SystemVerilog"

Ultra compact “green” 150W AC-DC power supply fits 2″ x 4″ footprint

January 19, 2011

19th January 2011, XP Power today announced the launch of the ECP150 series of highly efficient and extremely compact open frame 150W AC-DC power supplies. Measuring just 4 x 2 x 1.26 inches (101.6 x 50.8 x 32 mm) and with a power density of 14.88 Watts per cubic inch, the series comply with UL/EN/IEC60950-1 and UL/EN/IEC60601-1 safety standards for medical and IT equipment. In addition, the units have a no load input power of less than 0.5W and a typical efficiency of 91%, helping the end equipment comply with internationally recognized energy efficiency … Read More → "Ultra compact “green” 150W AC-DC power supply fits 2″ x 4″ footprint"

Argon Design announces partnership with leading Network Intelligence expert Qosmos

January 19, 2011

London, UK – 19th January 2011 – Argon Design, a leading provider of technology, product innovation and engineering solutions to the communications, multimedia and semiconductor industries, has joined the Qosmos Expert Developers (QED) program.

Argon Design, a high technology design company based in Cambridge, UK, is focused on delivering Multicore, Manycore and parallel processing design solutions. It provides system, hardware, FPGA and ASIC design, with advanced software design and development for a range of clients from entrepreneurial start-ups to established multinational … Read More → "Argon Design announces partnership with leading Network Intelligence expert Qosmos"

conga-BAF offers outstanding graphics performance with low power consumption

January 19, 2011

Read More → "conga-BAF offers outstanding graphics performance with low power consumption"

Sidense Memory IP Qualified at Three GLOBALFOUNDRIES Processes

January 18, 2011

Ottawa, Canada – January 18, 2011 – Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, announced today that the Company has qualified its OTP (one-time programmable) SiPROM products in three GLOBALFOUNDRIES CMOS processes – 180nm, 130nm and 65nm. Customers are using Sidense OTP implemented by GLOBALFOUNDRIES in a wide range of products, targeting such diverse applications as USB and touch screen controllers, silicon clocks, power management chips, HDMI controllers and configurable storage.