News – Page 2104 – EEJournal

JamaicaVM 6 is now available for multicore systems

February 7, 2011

The aicas group will introduce the new multiprocessor version of the JamaicaVM hard realtime Java runtime environment at the Embedded World conference in Nuremberg Germany from 1-3 March 2011. It is based on the proven JamaicaVM 6 product, which supports the J2SE Java 6 standard classes. Memory management has been optimized to simultaneously run multiple realtime threads on different CPUs with minimal contention. The assignment of Java threads to specific processor cores can be handled by JamaicaVM or directly controlled by the user. Even applications that were not built for multiprocessor systems can benefit from JamaicaVM 6 Multicore by running memory management … Read More → "JamaicaVM 6 is now available for multicore systems"

Digi-Key Corporation Announces Global Distribution Agreement with Advanced Linear Devices, Inc.

February 7, 2011

Monday, February 7, 2011 – THIEF RIVER FALLS, Minnesota and Sunnyvale, California, USA — Electronic components distributor Digi-Key Corporation, recognized by design engineers as having the industry’sRead More → "Digi-Key Corporation Announces Global Distribution Agreement with Advanced Linear Devices, Inc."

Synopsys Announces New Technology for Optimizing Multicore Systems

February 7, 2011

MOUNTAIN VIEW, Calif., Feb. 7, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the broad availability of Platform Architect with Multicore Optimization Technology, a new solution for performance analysis and early definition of multicore system architectures in SystemC. Using Platform Architect with Multicore Optimization Technology, designers of SoCs, chipsets and systems can capture hardware/software performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.

“Given the escalating costs of SoC design, system … Read More → "Synopsys Announces New Technology for Optimizing Multicore Systems"

Jasper DVCon Highlights: ActiveProp and Advanced Formal Solutions

February 7, 2011

WHAT: Jasper Design Automation’s ActiveProp™ property synthesis tool will make its North American debut at this year’s DVCon. ActiveProp automatically synthesizes properties to expand the property verification set, increase functional coverage, and identify coverage holes. Jasper is also highlighting its industry-leading formal solutions, including JasperGold®, ActiveDesign™ and Intelligent Proof Kits that speed the verification of SoC interconnect protocols. Jasper’s advanced technology addresses verification challenges across the spectrum of design applications from architectural verification to post-silicon validation.

Lattice Announces Five New IP Suites For The LatticeECP3 FPGA Family

February 7, 2011

HILLSBORO, OR – FEBRUARY 7, 2011 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of five new comprehensive Intellectual Property (IP) Suites to accelerate the design of electronic systems in a variety of industries using the award winning LatticeECP3™ FPGA family. These five IP suites are PCI Express, Ethernet Networking, Digital Signal Processing, Video & Display, and Value.

Curtiss-Wright Controls Debuts New 48-Port 10GbE Physical Layer Switch Port Card

February 4, 2011

DAYTON, OH – February 2, 2011 — Curtiss-Wright Controls Electronic Systems, a business group of Curtiss-Wright Controls and the developer of the Physical Layer Switch (PLS), has announced the availability of its new RT11000 48-port 10 Gigabit Ethernet (GbE) card designed for use with its industry-leading GLX4000 and Read More → "Curtiss-Wright Controls Debuts New 48-Port 10GbE Physical Layer Switch Port Card"

Anritsu Introduces Jitter Tolerance and 4Tap Pre-emphasis Solution that Conducts Signal Integrity Measurements up to 28 Gbit/s

February 4, 2011

Santa Clara, CA – February 1, 2011 – Anritsu Company introduces a jitter tolerance and 4Tap pre-emphasis solution specifically designed to test interconnects up to 28 Gbit/s, at DesignCon 2011. Developed to meet the signal integrity requirements associated with designing backplanes for today’s high-speed interconnects, such as Infiniband 26G-IB-EDR, CEI-25G, CEI-28G-VSR, PCI Express, SAS, SATA, FB-DIMM, USB 3.0 and Display Port, the solution allows engineers to ensure their products meet designated specifications.

At the center of the solution is the MP1800A Signal Quality Analyzer (SQA), which is integrated with the MU181500B Jitter Modulation … Read More → "Anritsu Introduces Jitter Tolerance and 4Tap Pre-emphasis Solution that Conducts Signal Integrity Measurements up to 28 Gbit/s"

Synopsys Invites Cadence Incisive and Mentor Graphics Questa Users to the Verification FastForward Program

February 4, 2011

MOUNTAIN VIEW, Calif., Feb. 3, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the verification FastForward migration program. The program helps Cadence® Incisive® and Mentor Graphics® Questa® users to migrate to the VCS® functional verification solution and benefit from its superior technologies. These include: innovative performance engines; the industry’s broadest SystemVerilog support for VMM, OVM, and the UVM methodologies; a powerful constraints solver; new coverage closure technologies; unique low power verification capabilities; and a rich portfolio of verification IP. … Read More → "Synopsys Invites Cadence Incisive and Mentor Graphics Questa Users to the Verification FastForward Program"

Avago Technologies Premieres New 30-Gbps 28-nm ASIC Embedded SerDes Using LeCroy WaveMaster 8 Zi-A Oscilloscope at DesignCon 2011

February 2, 2011

Chestnut Ridge, NY and Santa Clara, CA, January 31, 2011 – LeCroy Corporation announced today that Avago Technologies will use LeCroy’s WaveMaster 8 Zi-A Oscilloscope to demonstrate 30-Gbps performance with its new Serializer/Deserializer (SerDes) core in 28-nm process technology. The demonstration will take place in the LeCroy booth (#307) at the DesignCon 2011 exhibition in the Santa Clara Convention Center in Santa Clara, California from February 1-2.

LeCroy is honored that Avago chose its WaveMaster 8 Zi-A to provide the record-breaking bandwidth and signal fidelity needed to support their new high speed technologies,” said President and Chief … Read More → "Avago Technologies Premieres New 30-Gbps 28-nm ASIC Embedded SerDes Using LeCroy WaveMaster 8 Zi-A Oscilloscope at DesignCon 2011"

Agilent Technologies Introduces Power Integrity Solution to Solve Key Challenge in Designing Power Distribution Networks

February 2, 2011

SANTA CLARA, Calif., Feb. 1, 2011 – Agilent Technologies Inc. (NYSE:A) today introduced its power integrity solution to quickly and accurately solve the perforated-plane power integrity challenge. Available in Agilent’s Advanced Design System 2011 Momentum, the solution is used for designing a power distribution network with the heavily perforated power and ground planes found in modern printed circuit board designs.

Traditionally, boards have had dedicated power and ground planes … Read More → "Agilent Technologies Introduces Power Integrity Solution to Solve Key Challenge in Designing Power Distribution Networks"