SAN JOSE, CA–(Marketwire – October 09, 2012) – Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, slashed multiple weeks from its design schedule on a 28-nanometer system-on-chip (SoC) by switching to the Cadence® signoff solution. In concert with the Cadence RTL-to-GDSII flow, ST deployed Cadence signoff technologies to gain better quality of results and productivity while accelerating time to market in the tapeout of an advanced SoC.</ … Read More → "Cadence Signoff Solution Produces Time-to-Market Advantage for STMicroelectronics"

MOUNTAIN VIEW, Calif., Oct. 9, 2012 /PRNewswire/ —

Highlights:

• Direct optimization method can reduce sensitivity of optical systems to manufacturing tolerances, improve as-built performance and minimize production costs
• New tolerancing feature provides increased flexibility for modeling surface irregularities and evaluating their impact on system performance

Synopsys, Inc. (Nasdaq: SNPS), a global leader accelerating innovation in the design, verification and manufacture of chips and systems, today announced the availability of Synopsys’ CODE V^® Optical Design Software, version 10.5, which offers new and improved optimization and tolerancing capabilities for … Read More → "Synopsys’ CODE V Delivers Optical Design Innovations That Enable Reduced Manufacturing Costs"