Jasper Makes Formal Verification Power-Aware With a New Low Power App for Verification of SOCs With Multiple Power Domains
May 14, 2013, MOUNTAIN VIEW, Calif. — Jasper Design Automation, the leading provider of verification solutions based on state-of-the-art formal technology, has announced the availability of its new JasperGold® Low Power Verification App (JG-LPV App) which enables users to utilize formal methods for the verification of SOC designs optimized for lower power consumption with multiple voltage and power-management domains. The JG-LPV App reads the RTL description and creates an internal power-aware formal model in accordance with the power partitioning specifications. The new App verifies power optimization structures, power management circuitry, power sequencing, and … Read More → "Jasper Makes Formal Verification Power-Aware With a New Low Power App for Verification of SOCs With Multiple Power Domains"
