Algo-Logic Systems 3rd Generation TCP Endpoint Achieves Ultra-low-latency of 76-nanoseconds on Stratix V FPGA
Santa Clara, California, July 26, 2013 – Algo-Logic Systems, a recognized leader in providing hardware-accelerated, deterministic, ultra-low-latency products, systems and solutions for accelerated finance, packet processing and embedded system industries, today announced availability of their new 3rd Generation TCP Endpoint. The IP-Core enables FPGA-implemented logic to directly communicate over 10 Gigabit Ethernet networks with remote hardware or software devices and includes a robust hardware application programming interface that supports multiple real-world accelerated finance use cases.
The mature, proven, reliable and network-tested TCP endpoint delivers ultra-low-latency of 76-nanoseconds with the highest possible TCP bandwidth at full duplex rates of 20 Gbps … Read More → "Algo-Logic Systems 3rd Generation TCP Endpoint Achieves Ultra-low-latency of 76-nanoseconds on Stratix V FPGA"

