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Cypress Provides Solutions IP for New PSoC® 3 Devices and Revolutionary PSoC Creator™ IDE

Free Example Projects at www.cypress.com Allow Embedded Developers to Implement Designs More Quickly with Easily-Replicated, Robust IP Elements

SAN JOSE, Calif.–(BUSINESS WIRE)–Cypress Semiconductor Corp. (NYSE:CY) today announced the availability of over 30 intellectual property (IP) elements for its new PSoC® 3 programmable system-on-chip architectures. The embedded design resources include example projects, application notes and solution overviews, all of which enable engineers to quickly implement designs using the unique new PSoC Creator™ integrated development environment (IDE). The solution IP Elements are available for free at www.cypress.com/go/psoc3.

Read More → "Cypress Provides Solutions IP for New PSoC® 3 Devices and Revolutionary PSoC Creator™ IDE"

Agilent Technologies’ Application Note, “Generating and Applying High-Power Output Signals” Available Now

What: The application note describes the Agilent PSG Option 521, and its applications in high-power output signals. With Option 521 installed, the PSG simplifies the testing of high-power amplifiers, overcomes losses within automated test equipment (ATE) systems, and addresses the attenuation of signals within long cable runs. Additional benefits described are reduced cost, size and weight for test configurations/systems.

When: Available now

Where: To download the application note: http://cp.literature.agilent.com/litweb/pdf/5990-4695EN.pdf

Additional
Information: www.agilent.com/find/AD

Read More → "Agilent Technologies’ Application Note, “Generating and Applying High-Power Output Signals” Available Now"

Triad Semiconductor to Exhibit at International SoC Conference and Present on Via-configurable, Mixed-signal Embedded ASICS Using the ARM Cortex-M0 Microcontroller

WINSTON-SALEM, N.C. – September 27, 2009 – Triad Semiconductor Inc., the industry’s leading supplier of via-configurable mixed-signal ASICs, will demonstrate its silicon-proven via-configurable array (VCA) technology for analog, digital and mixed-signal design at the 7th International System-on-chip (SoC) Conference and Workshops in Newport Beach, California, on November 4th, 2009. The company’s CTO, Jim Kemerling, also will present on “Via-configurable, Mixed-signal Embedded ASICs Using the ARM Cortex-M0 Microcontroller.”

What:
Exhibiting: The Triad Mocha™ family of ARM Powered® VCAs, which combine the ARM® Cortex™-M0 processor with … Read More → "Triad Semiconductor to Exhibit at International SoC Conference and Present on Via-configurable, Mixed-signal Embedded ASICS Using the ARM Cortex-M0 Microcontroller"

WIN Semiconductors Announces New MMIC Tool Bar Personality for Agilent Technologies’ ADS Process Design Kits

WIN Semiconductors today announced the availability of a new MMIC tool bar personality for ten Advanced Design System (ADS) process design kits (PDKs) for its popular Enhancement/Depletion-Mode PHEMT and HBT process technologies. The new add-on WIN PDKs, developed for use with current and future releases of Agilent Technologies’ ADS 2009, enable high-frequency RF and microwave designers to create compact integrated circuits comprised of power amplifiers, switches, low-noise amplifiers, mixers, and logic circuitry. The add-on PDKs are available now from WIN Semiconductors.

“These add-on kits will significantly improve the design experience for our mutual customers working on … Read More → "WIN Semiconductors Announces New MMIC Tool Bar Personality for Agilent Technologies’ ADS Process Design Kits"

TSMC Selects Calibre Physical Verification Platform for Integrated Sign-off Flow

WILSONVILLE, Ore., October 22, 2009 – Mentor Graphics Corporation (NASDAQ: MENT) today announced that Taiwan Semiconductor Manufacturing Company (TSMC) selected the Calibre® physical verification platform for its Integrated Sign-Off (ISO) Flow, which integrates tools, setup files, and flow management utilities to provide mutual customers with an automated design solution for implementing their chips in TSMC technologies. The new flow is now available for 65nm designs with planned extensions into other process technology nodes.

According to ST Juang, senior director of Design Infrastructure Marketing at TSMC,
“Integrated Sign-Off Flow leverages our close partnership with eco-system partners to … Read More → "TSMC Selects Calibre Physical Verification Platform for Integrated Sign-off Flow"

QualiSystems releases feature-rich TestShell 4.1

TestShell Test Automation platform accelerates test creation with multiple new features

22 October 2009, Tel Aviv, Israel; QualiSystems Ltd announced today the release to market of TestShell 4.1, its latest and most advanced version of the award-winning automated test solutions for hardware, devices and embedded systems (http://tinyurl.com/ylkx464). TestShell 4.1 is packed with groundbreaking new features, providing TestShell users with greater usability and flexibility than ever before.

TestShell Test Authoring Applications in particular enjoy a great boost in versatility and capabilities. Session Management allows greater control and tracking of tests, steps and functions; Enhanced … Read More → "QualiSystems releases feature-rich TestShell 4.1"

47th Design Automation Conference Announces Calls for Submissions to Technical Program

Deadlines Begin on October 26, 2009

Design Automation Conference 2010
LOUISVILLE, Colo.–(BUSINESS WIRE)–The 47th Design Automation Conference (DAC), the premier conference devoted to electronic design and design automation (EDA), has opened the first Call for Contributions to the technical program. The 47th DAC will be held at the Anaheim Convention Center, in Anaheim, California from June 13-18, 2010. IC designers, application engineers, design flow developers, vendor-customer teams and students are invited to submit proposals for eight different areas of the technical program enumerated below. DAC is also accepting proposals for workshops and co-located events.

Special … Read More → "47th Design Automation Conference Announces Calls for Submissions to Technical Program"

ARM and Mentor Graphics Announce Support for Nucleus RTOS and Nucleus Graphics in the RealView Development Suite

WILSONVILLE, Ore. and CAMBRIDGE, UK, Oct. 21, 2009 — Mentor Graphics Corporation (NASDAQ: MENT) and ARM [(LSE:ARM); (NASDAQ:ARMH)] today announced at ARM TechCon 3, Santa Clara, Calif., a comprehensive software development solution for Nucleus® RTOS and Nucleus Graphics on ARM® processors. This is the result of a close collaboration to develop Nucleus RTOS awareness in the ARM RealView® Development Suite and to include the RealView Compiler in the Nucleus distribution.

Mentor Graphics has adopted the RealView Compiler as the reference compiler for Nucleus RTOS and middleware, which will result in end products with even … Read More → "ARM and Mentor Graphics Announce Support for Nucleus RTOS and Nucleus Graphics in the RealView Development Suite"

Synopsys enables optimised high performance energy efficient ARM processor-based designs

Optimised implementation methodology enables 2GHz fully synthesisable ARM Cortex-A8 processor for advanced mobile and consumer applications

MOUNTAIN VIEW, Calif., Oct. 20 – Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has created an optimised reference implementation methodology for the ARM(R) Cortex(TM)-A8 processor that achieves greater than 2GHz (4000 DMIPS) at 540mW. This result was accomplished by combining optimised methodology, tools and ARM Physical IP to enable new classes of mobile and tethered devices requiring the combination of high performance and energy … Read More → "Synopsys enables optimised high performance energy efficient ARM processor-based designs"

Industry’s Highest Capacity PCI Express 3.0 Controller IP Core From Denali Software Adopted by Cray

Best-in-Class Solutions Speed Design-to-Silicon Success of PCI Express Technology

SUNNYVALE, Calif., Oct. 20 /PRNewswire/ — Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that Cray has adopted Denali Databahn(TM) PCI Express (PCIe) controller core and PureSpec(TM) verification IP (VIP), which support the latest PCIe 3.0 specifications from the PCI-SIG. The 16-lane PCIe 3.0 controller from Denali can deliver 128 GT/s of raw bandwidth, surpassing a 100G Ethernet interface. This is equivalent to transferring a full 3-hour high-definition movie file in under one second.
“Our systems are deployed … Read More → "Industry’s Highest Capacity PCI Express 3.0 Controller IP Core From Denali Software Adopted by Cray"

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