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Nuvation Launches New Battery Management System

September 16, Novi, Michigan, THE BATTERY SHOW. Nuvation Engineering has begun taking orders for a Q4 product release of Nuvation BMS™, their new battery management system for high capacity battery packs with outputs in the 36VDC to 1200VDC range.  Many off-the-shelf battery management systems do not natively support voltages as high as 1200VDC, a target set by Nuvation’s Director of Product Management, John Corman, to address the upper end of grid energy storage requirements.

“We designed this BMS in response to client requests for an off-the-shelf BMS that would eliminate the need for them to continuously design … Read More → "Nuvation Launches New Battery Management System"

Synopsys’ New DesignWare MIPI D-PHY Cuts Area and Power by 50 Percent

MOUNTAIN VIEW, Calif., Sept. 17, 2014 /PRNewswire/ —

Highlights:

  • DesignWare MIPI D-PHY is 50 percent lower in area and power compared to competitive solutions, reducing silicon cost and extending battery life
  • Compliance to the MIPI D-PHY v1.2 specification delivers aggregated data throughput of up to 20 Gbps for high-resolution imaging applications
  • Proven interoperability with Synopsys DesignWare MIPI CSI-2 and MIPI DSI Controllers combined with MIPI verification IP provides a complete, verified solution that reduces integration risk
  • Configurability options enable targeting multiple applications with the same SoC

Read More → "Synopsys’ New DesignWare MIPI D-PHY Cuts Area and Power by 50 Percent"

Open-Silicon Speeds and Simplifies ASIC Development for 100G Networks

MILPITAS, CA, Sep 16, 2014 (Marketwired via COMTEX) — Open-Silicon today announced a 28Gbps Serializer/Deserializer (SerDes) evaluation platform for ASIC development that will enable the rapid deployment of chips and systems for 100G networks. The platform includes a full board with packaged 28nm test chip, software and characterization data. The chip integrates a 28Gbps SerDes quad macro, using physical layer (PHY) IP from Semtech, and meets the compliance needs of the CEI-28G-VSR, CEI-25-LR and CEI-28G-SR specifications. 

“Silicon-proven IP, such as the advanced 28Gbps SerDes PHY developed by Semtech, is central to our success as a leading … Read More → "Open-Silicon Speeds and Simplifies ASIC Development for 100G Networks"

Silicon Labs Simplifies Clock Tree Design for Complex Internet Infrastructure Applications

AUSTIN, Texas – Sept. 17, 2014 – Silicon Labs (NASDAQ: SLAB), a leader in high-performance, analog-intensive, mixed-signal ICs, today launched an online timing utility that eases the complexity of designing clock trees for a wide range of Internet infrastructure applications including high-speed networking, telecommunications and data center equipment. Silicon Labs’ new Clock Tree Expert tool enables embedded developers to generate sophisticated, streamlined clock tree block diagrams within minutes, simplifying system design, reducing bill of materials (BOM) count and speeding time to market.

Today’s networking and … Read More → "Silicon Labs Simplifies Clock Tree Design for Complex Internet Infrastructure Applications"

Cavium Standardizes on Synopsys’ IC Compiler for High-performance Processor-based SoC Designs

MOUNTAIN VIEW, Calif., Sept. 17, 2014 /PRNewswire/ — 

Highlights:

  • Highest operating frequency achieved through pre-route look-ahead technologies
  • Concurrent dynamic and leakage power optimization targets FinFET-based process technology
  • Faster design closure using PrimeTime physically-aware ECO

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of the 2014.09 release of its IC Compiler place and route product, a key component of … Read More → "Cavium Standardizes on Synopsys’ IC Compiler for High-performance Processor-based SoC Designs"

CaddieON® Improves Your Golf Game with Technologies from STMicroelectronics

Geneva, September 17, 2014 – The world’s golfers can enjoy their sport even more using the new CaddieON® electronic golf-play analyzer built with advanced sensing, control, and wireless communication chips from STMicroelectronics (NYSE: STM), a global semiconductor leader serving customers across the spectrum of electronics applications.

Launched by tech startup CaddieON Inc., this personal electronic caddie help golfers automatically track and analyze their game. The easy-to-use system comprises a smart-sensor wrist device, simple RFID tags for identifying each club, the smartphone app, and a player portal in cloud service.

The wrist device reads each club’ … Read More → "CaddieON® Improves Your Golf Game with Technologies from STMicroelectronics"

Industry’s lowest-power 25- to 160-MSPS analog-to-digital converter family saves energy in industrial designs

DALLAS (Sep. 17, 2014) – Texas Instruments (TI) (NASDAQ: TXN) expanded its data converter portfolio today with a new family of small, pin-compatible analog-to-digital converters (ADCs) that provide a best-in-class power-to-performance ratio. The ADC3k family includes 12- and 14-bit options in speed grades of up to 160 MSPS with 2 or 4 channels and with LVDS or JESD204B interfaces. The devices support the industrial ambient temperature range of -40C to 85C for use in industrial applications, such as motor control, medical imaging, and portable test and measurement, as well as defense and communications applications, such as software defined radio and MIMO communications. … Read More → "Industry’s lowest-power 25- to 160-MSPS analog-to-digital converter family saves energy in industrial designs"

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