News – Page 1503 – EEJournal

Videantis showcases low power vision processor IP at the Embedded Vision Summit

April 30, 2015

Hannover, Germany, April 30, 2015 – Videantis, the leading licensor of video/vision processor IP and optimized application libraries for automotive, mobile, and consumer markets, will showcase its licensable solutions at the Embedded Vision Summit on May 12th in Santa Clara.

Videantis will show joint customer and partner silicon demonstrations that use the v-MP4000HDX scalable processor architecture to implement high-performance vision applications in a low-power and small-silicon-area footprint.

Altera and videantis have jointly developed a concept demonstration that combines an Altera Cyclone V FPGA with the videantis v-MP4280HDX vision processor. The combined solution runs a wide … Read More → "Videantis showcases low power vision processor IP at the Embedded Vision Summit"

Mentor Graphics Announces Nucleus RTOS for Wearable Devices

April 30, 2015

WILSONVILLE, Ore., April 30, 2015 — The Mentor® Embedded Nucleus® real time operating system (RTOS) framework includes a complete range of features targeting next-generation wearable Internet of Things (IoT) devices for the medical, fitness, and security markets:

• Mentor Embedded Nucleus RTOS provides a comprehensive operating system and extensive protocol support for cloud connectivity designed for embedded developers working on wearable devices.
• Integrated multicore framework with inter-process communication (IPC) and remote process life cycle supports booting up and shutting down individual processors/cores … Read More → "Mentor Graphics Announces Nucleus RTOS for Wearable Devices"

Symtavision releases new features for Ethernet and multicore with launch of SymTA/S 3.7 and TraceAnalyzer 3.7

April 29, 2015

Braunschweig (Germany) – April 29, 2015. Symtavision, the global leader in timing analysis solutions for planning, optimizing and verifying embedded real-time systems, has launched SymTA/S 3.7, further strengthening and improving timing design and verification for automotive Ethernet and multicore systems.

SymTA/S 3.7 introduces new Ethernet timing design and verification features including the modeling and analysis of dynamic data chains and data dependent dynamic Ethernet frame packing as well as faster system distribution analysis compared to previous versions. In addition, SymTA/S 3.7 incorporates a range of new, general modeling and timing analysis features – Gantt-Filter, APIs and improved AUTOSAR 4.x multicore import. … Read More → "Symtavision releases new features for Ethernet and multicore with launch of SymTA/S 3.7 and TraceAnalyzer 3.7"

Keysight Technologies Unveils WaferPro Express 2015 Software Platform for Wafer-Level Device Characterization

April 29, 2015

SANTA ROSA, Calif., April 28, 2015 – Keysight Technologies, Inc. (NYSE: KEYS) today unveiled WaferPro Express 2015, a measurement software platform for the automated characterization of wafer-level devices and circuit components. By efficiently controlling all components in a wafer-level measurement system (instruments and wafer probers alike), WaferPro Express reduces measurement setup complexity and provides a unified platform for efficient automated measurement and data management.

High-volume wafer-level measurements are no longer exclusive to the semiconductor foundry production floor. Today, many R&D teams measure high-volume data for applications such as … Read More → "Keysight Technologies Unveils WaferPro Express 2015 Software Platform for Wafer-Level Device Characterization"

ReFLEX CES implements GigE Vision® IP from Pleora Technologies in Military Imaging System

April 29, 2015

Paris, France – April 28, 2015 – ReFLEX CES, a provider of Modified-Off-The-Shelf (MOTS) solutions and turnkey embedded systems, today announced that it has designed a complete Gigabit Ethernet (GigE) Vision compliant video module for one of France’s largest military equipment manufacturers. This advanced, high performance design has only been possible through the implementation of the new iPORT™ NTx-GigE IP Core Package from Pleora Technologies.

Pleora’s iPORT NTx-GigE IP Core Package, based on an Altera Cyclone V FPGA architecture, provides a dedicated and … Read More → "ReFLEX CES implements GigE Vision® IP from Pleora Technologies in Military Imaging System"

Ericsson converter brings unparalleled high power capability to highly demanding data networks

April 29, 2015

New high-density DC/DC power converter optimized for parallel operation
Easy paralleling ability and scalable up to three units reduces time-to-market and delivers power levels of up to 2200W for high-data-demand network boards
Advanced Hybrid Regulated Ratio technology and Droop Load Sharing boost performance to meet high-power board demands

Ericsson has introduced a new DC/DC converter module based on the company’s innovative and proprietary power topology known as Hybrid Regulated Ratio (HRR) technology. The latest member of the PKM-NH series, the PKM4817LNH has been optimized for parallel … Read More → "Ericsson converter brings unparalleled high power capability to highly demanding data networks"

PLS’ Universal Debug Engine 4.4.3 simplifies testing and debugging highly complex Xilinx Zynq-7000 SoC devices

April 29, 2015

Lauta (Germany), April 29, 2015 – PLS Programmierbare Logik & Systeme presents Version 4.4.3 of its Universal Debug Engine (UDE), which provides an optimized testing and debugging environment especially for the Xilinx Zynq-7000 SoC family of devices.

The All Programmable SoCs of the Xilinx Zynq-7000 family of devices combine for the first time dual-core ARM® Cortex™-A9 architecture with the functionality of complex Field Programmable Gate Arrays (FPGAs) on a single chip. In order to simplify development of appropriate powerful multi-core software, the UDE 4.4.3, among other … Read More → "PLS’ Universal Debug Engine 4.4.3 simplifies testing and debugging highly complex Xilinx Zynq-7000 SoC devices"

ams launches world’s smallest ambient light sensor for next generation thinner wearable products

April 29, 2015

Unterpremstaetten, Austria (29 April, 2015), ams AG (SIX: AMS), a leading provider of high performance sensors and analog ICs, today introduced the TSL2584TSV, an ambient light sensor (ALS) in a through-silicon via (TSV) package which has a footprint of just 1.145 x 1.66 mm and a height of 0.32 mm.

In display management applications, automatically controlling the backlight intensity with an ALS ensures the best possible user experience while extending battery life. The new TSL2584TSV’s outline and height are approximately half the size of competing ALS … Read More → "ams launches world’s smallest ambient light sensor for next generation thinner wearable products"

Cypress Introduces the Industry’s First 4Mb Serial F-RAM

April 29, 2015

SAN JOSE, Calif., April 29, 2015 – Cypress Semiconductor Corp. (NASDAQ: CY) today introduced a family of 4Mb serial Ferroelectric Random Access Memories (F-RAMs™), which are the industry’s highest density serial F-RAMs. The 4Mb serial F-RAMs feature a 40-Mhz Serial Peripheral Interface (SPI), a 2.0V to 3.6V operating voltage range and are available in industry-standard, RoHS-compliant package options. All Cypress F-RAMs provide 100-trillion read/write cycle endurance with 10-year data retention at 85?C and 151 years at 65?C.

Cypress F-RAMs are ideal solutions for applications requiring continuous and frequent high-speed reading and … Read More → "Cypress Introduces the Industry’s First 4Mb Serial F-RAM"

Ultra-High Definition Video Encoding Now Feasible in Low-Cost FPGAs or Low-End ASICs

April 28, 2015

Woodcliff Lake, NJ — April 28, 2015 — A new hardware encoder has the performance and efficiency needed to make 4K, 8K, or very high frame rate HD video output viable for low-volume or cost-sensitive products.

This new Ultra-High Throughput (UHT™) JPEG Encoder IP Core available from semiconductor intellectual property provider CAST, Inc., is sourced from semiconductor IP company Alma Technologies. The core uses a high-performance, scalable, parallel-processing architecture to efficiently handle the significant pixel processing demands of advanced video encoding. This makes it one of the few available … Read More → "Ultra-High Definition Video Encoding Now Feasible in Low-Cost FPGAs or Low-End ASICs"

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