18 December 2013: The open source RF hardware initiative, Myriad RF, has launched a new open-source interface board to connect field programmable RF (FPRF) transceiver systems directly to FPGA boards.

The mezzanine board, called Zipper, is a multi-carrier board with HSMC, FMC, general purpose pin header and USB connections. It allows the FPRF boards to interface with both Altera and Xilinx development platforms – and enables direct connection with a PC for control and calibration.

The resulting system enables wireless systems of almost … Read More → "MyriadRF launches Zipper, open-source hardware interface board to Altera and Xilinx platforms"

Santa Clara, Calif., December 17, 2013 – Achronix Semiconductor Corporation today announced that it has demonstrated error-free operation of 100G Ethernet functionality using the hard Ethernet IP in its Speedster22i® FPGAs. Speedster22i are the only FPGAs that have hardened IP for communication applications including 100G Ethernet, 100G Interlaken, PCI Express Gen3 x8 and DDR3 memory controllers. The 100G Ethernet video demonstration can be seen at Achronix.com.

“The hardened IP functions in Speedster22i FPGAs translate directly into power and cost savings for high bandwidth communication applications,” said Steve Mensor, vice president of Marketing at Achronix. “More importantly, … Read More → "Achronix Demonstrates Embedded 100G Ethernet in Speedster22i 22nm FPGAs"