• Joint development team leverages SEMulator3D to explore semiconductor process variation issues at unprecedented levels
• Collaboration team has conducted a massive computer modeling simulation of a million wafers to explore process variability in 7nm BEOL semiconductor fabrication
• The extending collaboration aims to further advance the availability, yield and cost of manufacturing processes for the next generation of 7 nm semiconductor products

Leuven, Belgium & Cary, North Carolina, United States – December 7, 2015 – Imec, a world-leading nanoelectronics research center and Coventor, a leading supplier of semiconductor process development tools, today announced the expansion of … Read More → "Imec, Coventor expand collaboration to optimize 7nm semiconductor manufacturing processes"

GRENOBLE, France – Dec. 7, 2015 – CEA-Leti today announced preliminary steps for demonstrating a quantum bit, or qubit, the building block of quantum information, in a process utilizing a silicon-on-insulator (SOI) CMOS platform.

While the leading solid-state-based approach today for treating quantum information uses superconducting qubits, there are several potential alternatives. These include semiconductor spin qubits, historically demonstrated in III-V materials, but with limited “lifetime” due to coupling between the electron spin and the nuclear spins of the III-V elements.

Only in recent years has the prospect of using nuclear spin-free, isotopically purified silicon-28, the most-common isotope, made … Read More → "CEA-Leti and CEA-Inac Pave the Way for Quantum Information Processing on SOI CMOS Platform"