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Mentor Graphics Analog FastSPICE™ Platform Selected By Silicon Labs for IoT IP Verification

May 25, 2016

WILSONVILLE, Ore., May 25, 2016— Mentor Graphics Corp. (Nasdaq: MENT) today announced that Silicon Labs, a leading provider of silicon, software, and solutions for the Internet of Things (IoT), has selected the Analog FastSPICE™ (AFS™) Platform for circuit verification and device noise analysis of its complex pre-layout and post-layout analog circuits. Silicon Labs is using AFS to analyze PLLs, data converters, wired and wireless transceivers, and other specialized high performance analog and RF circuits.

“We have stringent circuit verification and noise analysis requirements for … Read More → "Mentor Graphics Analog FastSPICE™ Platform Selected By Silicon Labs for IoT IP Verification"

Semifore Launches CoStar™ Platform to Re-Shape Hardware Design, Software Development and Verification

May 24, 2016

PALO ALTO, Calif. — May 23, 2016 — Semifore, Inc., a worldwide supplier of tools used to design and implement the hardware/software interface, today unveiled a platform of integrated tools to generate dramatic productivity improvements in hardware design, software development and verification for complex System-on-Chip (SoC) and FPGA design methodologies.

The platform, CoStar (Configuration Status Register) Design Director™ provides hardware and software design functionality and behavioral abstraction not available in any other commercial offering or industry standard. It provides multi-language support without the need for specialized interfaces or additional scripting to significantly improve designer productivity and interoperability efficiency as much … Read More → "Semifore Launches CoStar™ Platform to Re-Shape Hardware Design, Software Development and Verification"

Optimal+ Selected by Xilinx to Provide Real-Time Analytics for Wafer Sort and Final Test Manufacturing Operations

May 24, 2016

HOLON, Israel — Optimal+, a leader in Manufacturing Intelligence solutions, today announced that it was selected by Xilinx to provide real-time visibility into their production test operations taking place in their global supply chain. In a move intended to improve efficiency, quality and yield, Optimal+ and Xilinx collaborated to create an environment based on the Optimal+ Global Ops solution that would provide Xilinx with real-time visibility into all test operations occurring in their OSATs.

Through the use of the Optimal+ Big Data Infrastructure, Xilinx is able to monitor all aspects of their test operations … Read More → "Optimal+ Selected by Xilinx to Provide Real-Time Analytics for Wafer Sort and Final Test Manufacturing Operations"

ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms

May 24, 2016

Oxford, United Kingdom, May 24, 2016 — Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced the availability of models and virtual platforms for the Cortex-A72 ARMv8 processors, in addition to the previously released Cortex-A53 and A57 models.  This boosts the Imperas Open Virtual Platforms™ (OVP™) processor model library to over 160 models across a spectrum of IP vendors.  Over 40 ARM cores are supported including Cortex-A, Cortex-R and Cortex-M families.

Imperas support for ARMv8 cores, such as the Cortex-A72, includes models, Extendable Platform Kits™ (EPKs™), integration with ARM DS-5 for … Read More → "ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms"

Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time

May 24, 2016

MOUNTAIN VIEW, Calif., May 23, 2016 /PRNewswire/ —

Highlights:

  • Enables earlier narrowing down of process and device options, reducing expensive and time-consuming wafer-based iterations
  • Allows creation of higher-quality early Process Design Kits (PDKs) for design technology co-optimization (DTCO)
  • Targeted to advanced process nodes
  • Early PDK enables IP designers to deliver more competitive products

Synopsys, Inc. (NASDAQ: SNPS) today announced a pre-wafer simulation solution to help semiconductor manufacturers reduce process node development time. The new solution provides a comprehensive process, transistor and circuit simulation flow that enables … Read More → "Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time"

Ampleon demonstrates Wideband System Solution featuring Xilinx DPD IP at IMS 2016

May 24, 2016

Nijmegen, The Netherlands– May 24th, 2016 – Ampleon today announced it will demonstrate a wideband system solution at IMS 2016 that uses Xilinx’s Digital Pre-Distortion (DPD) IP with Xilinx All Programmable SoC and MPSoC technology.

DPD and power amplifier (PA) efficiency improvements are closely related, because PAs with higher efficiencies tend to be less linear and more difficult to pre-correct. Advanced pre-distortion systems are needed to recover the wanted linearity. The advent of wide-band and multiband systems poses additional challenges to the pre-distortion system, … Read More → "Ampleon demonstrates Wideband System Solution featuring Xilinx DPD IP at IMS 2016"

Imec and Infineon Cooperate on 79 GHz CMOS Radar Sensor Chips for the Automotive Industry

May 24, 2016

Leuven (Belgium) and Munich (Germany) – May 24, 2016 – The world-leading nanoelectronics research center imec and semiconductor manufacturer Infineon Technologies AG (FSE: IFX / OTCQX: IFNNY) today announced that they are cooperating in CMOS sensor chip development. Based on the agreement unveiled at the annual Imec Technology Forum in Brussels (ITF Brussels 2016), Infineon and imec are working on highly integrated CMOS-based 79 GHz sensor chips for automotive radar applications. Imec contributes its advanced expertise in high-frequency system, circuit and antenna design for radar applications thus complementing Infineon’s radar sensor chip … Read More → "Imec and Infineon Cooperate on 79 GHz CMOS Radar Sensor Chips for the Automotive Industry"

Synopsys Delivers Industry’s First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect

May 24, 2016

MOUNTAIN VIEW, Calif., May 24, 2016 /PRNewswire/ — Synopsys, Inc. (NASDAQ: SNPS) today announced the availability of the industry’s first cache coherent subsystem verification solution for Arteris’ Ncore interconnect.  The Arteris Ncore interconnect is a configurable distributed heterogeneous cache coherent interconnect that enables system on chip (SoC) teams to efficiently design customized, fully coherent systems.  With Synopsys’ configurable cache coherent Network-on-Chip (NoC) subsystem verification solution, SoC teams can accelerate verification closure of their particular Arteris Ncore cache coherent interconnect configuration.

“The Arteris Ncore interconnect delivers enhanced configurability for heterogeneous … Read More → "Synopsys Delivers Industry’s First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect"

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