WILSONVILLE, Ore., October 5, 2016 – Mentor Graphics^® Corporation (NASDAQ: MENT), Northwest Logic and Krivi Semiconductor today announced the availability of a complete DDR4 SDRAM IP design and verification solution that enables ASIC and FPGA design teams to quickly design and verify DDR4 memory subsystems in the Mentor Graphics IP Partnership Program.  Together, Mentor Graphics, Northwest Logic, and Krivi Semiconductor enable customers to reduce time-to-market by a factor of 2X by integrating complementary design and verification IP into a single flow.  Northwest Logic provides silicon-proven, high-performance, easy-to-use memory controller design … Read More → "Mentor Graphics, Northwest Logic, and Krivi Semiconductor Announce Availability of Complete DDR4 SDRAM IP Design and Verification Solution"

• 2Gbps per pin data rate at longer trace lengths

• Available for 2.5D ASIC design starts and also as a licensable IP subsystem

Milpitas, CA, September 28, 2016 – Open-Silicon, a system-optimized ASIC solution provider, today announced it has successfully taped out the industry’s first High Bandwidth Memory (HBM2) IP subsystem in TSMC’s 16nm FF+ process in combination with TSMC’s CoWoS® 2.5D silicon interposer technology. This full IP subsystem … Read More → "Open-Silicon Tapes Out Industry’s First High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in 16nm FF+"