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Imec unveils 7‑bit, 175GS/s massively time-interleaved slope- ADC – pairing record-small footprint and low conversion energy with top sampling speed

Patented linearization and switched input buffer techniques ensure precise signal conversion and wide bandwidth at high speeds
  • At IEEE ISSCC 2026, imec introduces a 7-bit, 175GS/s wireline ADC implemented in 5nm FinFET technology, combining a record-small footprint (250 x 250µm²) and low conversion energy (2.2 pJ per sample).
  • The design builds on the massively timeinterleaved slopeADC architecture imec debuted in 2024, now enhanced with patented linearization and switched input buffer techniques to ensure precise signal conversion and wide bandwidth at ultra-high sampling rates.
  • As data centers’ optical networks need constant upgrades to handle ever-higher throughputs and processing demands, wireline ADCs – essential in optical transceivers – often grow in size, requiring longer interconnects, and introducing parasitics and energy loss. Imec’s new ADC changes that, making every square micron and milliwatt count. 

 

LEUVEN (Belgium), FEBRUARY 17, 2026 This week at IEEE ISSCC 2026, imec – a world-leading R&D center in advanced semiconductor technologies – unveiled a 7bit, 175GS/s analogtodigital converter (ADC) that combines a record-small footprint (250 x 250µm²) and low conversion energy with one of the fastest sampling speeds ever reported. As such, imec’s ADC meets the rapidly increasing throughput and processing demands of AI- and cloud-driven data centers, without the area and power explosion typically seen at ultra-high sampling rates. 

Driven by AI and cloud applications, data centers’ optical communication networks need constant upgrades to handle ever-higher throughputs and processing demands. But as sampling rates climb beyond 100GS/s, the underlying components – such as wireline ADCs, essential in optical transceivers – tend to grow in size, requiring longer interconnects, and introducing parasitics and energy loss.

At the 2024 edition of the IEEE International Solid-State Circuits Conference (ISSCC), imec tackled this challenge with a breakthrough: a massively time-interleaved slope-ADC architecture at least twice as compact as conventional designs and featuring state-of-the-art power efficiency. Building on that approach, imec now takes the next step with the introduction of a record-small ADC that ensures precise signal conversion and wide bandwidth at ultra-high sampling rates.

Patented linearization and switched input buffers techniques

“Our 7-bit, 175GS/s ADC – implemented in 5nm FinFET technology – pairs a record-small core area of 250 x 250µm2, and low conversion energy (2.2 pJ per sample), with a sampling speed that ranks among the fastest ever reported. This makes it a compelling solution for upscaling digitalintensive wireline interconnects, where every square micron and milliwatt count,” said Peter Ossieur, portfolio director at imec.

Two patented innovations make this possible. First, a novel linearization approach – shaping the slope signal – corrects distortions. Second, switched input buffers efficiently feed the ADC’s 2,048-channel time-interleaved array, minimizing electrical load and enabling ultra-fast sampling without compromising signal integrity.

Pushing toward – and beyond – the 300GS/s milestone

Building on the ADC presented at this year’s ISSCC, imec is now developing a 3nm followon design and exploring 14 Ångstrom designs, in particular how such advanced nodes can be leveraged for high-performance wireline data converter designs.

Peter Ossieur: “Imec has a long-standing track record in developing high-speed integrated circuits for communication applications. One of our key research tracks focuses on optical transceivers (and their building blocks) that can keep pace with the rapidly increasing data rates in wireline systems. In this context, our ADCs represent a crucial step toward a new generation of compact, low-power converters for future wireline applications, pushing beyond the performance limits of SAR-based ADC architectures at ultra-high speeds. To accelerate this effort, we warmly invite partners – including fabless companies developing wireline connectivity building blocks – to join our ADC and DAC research programs, with licensing options available to access imec’s underlying IP portfolio.”

These research results are discussed during the “Pipeline and Ultra-High-Speed Data Converters” session (Session 11) on Tuesday, February 17, at 10:05 PST. 

Visit imec at ISSCC 2026 (booth #8) to explore collaboration and licensing opportunities. 

About imec

Imec is a world-leading research and innovation hub in advanced semiconductor technologies. Leveraging its state-of-the-art R&D infrastructure and the expertise of over 6,500 employees, imec drives innovation in semiconductor and system scaling, artificial intelligence, silicon photonics, connectivity, and sensing.

Imec’s advanced research powers breakthroughs across a wide range of industries, including computing, health, automotive, energy, infotainment, industry, agrifood, and security. Through IC-Link, imec guides companies through every step of the chip journey – from initial concept to full-scale manufacturing – delivering customized solutions tailored to meet the most advanced design and production needs.

Imec collaborates with global leaders across the semiconductor value chain, as well as with technology companies, start-ups, academia, and research institutions in Flanders and worldwide. Headquartered in Leuven, Belgium, imec has research facilities in Belgium, across Europe and the USA, and representation on three continents. In 2024, imec reported revenues of €1.034 billion.

For more information, visit www.imec-int.com

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