It’s time to saddle up and ride into the semiconductor sunset! Whether you’re hitchin’ your wagon to a young whipper-snapper node, or lassoin’ a long-in-the-tooth workhorse process, the time it takes to get your IC design up and out of the corral may depend more on the software you use to verify your design than on the silicon itself. In this week’s Fish Fry, Mary Ann White (Synopsys) and I get down to the very heart of semiconductor design: process geometries. We have ourselves a good ol’ time chatting about challenges of FinFET designs, the tricky bits of working with both advanced and established process nodes, and how the right tools can make all the difference when it comes to winning the big product-to-market rodeo.
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Links for August 22, 2014
More information about Synopsys
More information about Synopsys’ Galaxy Design Platform
New Episode of Chalk Talk: Vivado In-System Debug
