Tom Hart took physics in school and was a Bombardier-Navigator in the U.S. Navy. He knows that with proper focus you can take advantage of an exponential ratio to deliver many times more energy to a target than even a much larger unfocused source. As Chairman, President, and CEO of QuickLogic, he applies that same principle in leading his company to success. In a programmable logic industry that is blasting its light in all directions, trying to illuminate every square inch of the digital design landscape, Hart’s QuickLogic is a spotlight, concentrating its resources on solving … Read More → "E. Thomas Hart"

Choosing your FPGA development board used to be simple and straightforward. You selected a device for your project, called up your distributor, and a few days and dollars later you were the proud owner of “the kit,” which included the standard development board, a version of the design software, and maybe a reference design or two. Your new board had an FPGA in the middle, some configuration circuitry and perhaps a couple of peripherals, and a few standard connectors along the edges.

As time passed, your demands increased. With the newer generations of FPGAs, you needed more … Read More → "A Bevy of Boards"

Dealing with mass quantities of unsavory bugs is commonplace in both reality TV and modern-day chip design. And, the “fear factor” for both is the same, too: failure to do so in the time specified can put an end to a contestant’s 15 minutes of fame or cost a designer his or her job.

In the era of the system on chip (SoC), dealing with tens of millions of gates is a given for hardware design teams, but the time-to-market game is getting more complex and fraught with danger due to the explosion in embedded software. … Read More → "The Real Fear Factor"

When I was in college, I knew the future of supercomputing. The supercomputers of the 21st century would be massive, gleaming masterpieces of technology. They would not be installed into buildings, but rather buildings would be designed and constructed around them – particularly to house the cooling systems. The design specifics were fuzzy, but I was reasonably sure that very low temperatures would be involved for either superconducting connectivity, SQUIDs, or Josephson junction-esque switching. Silicon would certainly have been long abandoned in favor of Gallium Arsenide or some even more exotic semiconductor material. I believed that Cray, Inc., as the … Read More → "Cray Goes FPGA"

In the mythological “good old days” when many FPGA designs were nothing more than simple state machines, clocking was simple. Your average design had a single ticker oscillating merrily away at single-digit megahertz. Skew was something you did to vegetables when barbecuing shish kabobs, gating was an activity that applied to upscale housing developments, false paths were something you only ran into while hiking, and derived clocks were the two-dollar wristwatches you gave away at tradeshows with your company logo on them.

Now that the revolution has come, new alarms are starting to sound. Clocks are no … Read More → "Clock Watching"

What can you get for free? In this age of rapid technological evolution, it is not uncommon for valuable, cutting-edge technology to find its way into the “free cell phone” category. In an effort to market their wares, technology companies often find themselves offering high-value products at little or no cost in order to remove barriers to adoption of their principal products. Such is the case with design tools for FPGA. Most FPGA vendors offer sophisticated tool suites, either by free download or at an extremely low cost, in order to entice new designers to check out their chips … Read More → "Free Tool Friday"

Last year we pointed out that the embedded systems conference (ESC) was being quietly taken over by FPGAs. Booth after booth on the tradeshow floor boasted boards with programmable logic devices prominently displayed. The trend continued this year with even more programmable presence amidst a host of announcements bringing FPGAs more to the center of the embedded systems stage and, conversely, embedded applications to the forefront of the FPGA world.

All of the FPGA vendors had a presence this year, and booths were bustling with activity. FPGA Journal was on-hand to take in all the action, distill … Read More → "Deeply Embedded"

Digital signal processing has traditionally been the domain of DSP processors and ASICs. Since the late 1990s, FPGAs have emerged as alternative options for DSP designers. FPGAs are a good fit for applications that demand higher performance than what DSP processors can offer, yet do not meet the criteria to justify ASIC economics.

FPGAs Make Their Mark on Signal Processing

FPGAs have evolved from those where DSP structures were built using logic-only cells to those having dedicated embedded DSP structures, such as dynamically reconfigurable XtremeDSP slices in Xilinx Virtex-4 FPGAs. Such FPGAs incorporate … Read More → "Plug and Play Design Methodologies for FPGA-based Signal Processing"

For two US dollars, you can buy a bottle of water from the vending machine in a New York hotel lobby, or you could buy a single subway token. You could get into a New York taxicab, but you’d have to get right back out again. If you’re driving your own car, you could buy one gallon of unleaded gasoline. At most coffee houses, you could get a cup of plain drip coffee, but not an espresso drink. You could probably talk to your attorney for about 10 seconds. When it comes right down … Read More → "Two Bucks"

Introduction

Managing the increasing complexity of today’s digital applications calls for new design strategies. Risk, cost and time-to-market (TTM) can make or break a product development. While many designers are turning to FPGAs to reduce risk and improve TTM, the staggering per unit cost of high-density FPGAs quickly becomes intolerable for even low volume applications. Cell-based ASIC solutions offer much lower per unit cost, but the NREs for deep sub-micron technologies are becoming cost prohibitive. Structured ASICs fill the gap by offering excellent per unit cost and reasonable NREs. This paper describes … Read More → "High-Density FPGA-to-ASIC Conversions using Structured ASIC: Fills the Gap"