“But melord, the walls on the castle are thick, sir. There be but two ways to breach them, one being through the attaining of prodigious amounts of speed and energy and bounding therewith over the walls, and the other being the attaining of similar energies and smashing through. Both means may, my liege, be considered as unlikely as the migration of coconuts, for the walls be both high and strong. Verily, there may be one more purported way of breaching the wall, but only an the wall be thin enough, whereby one standing on the outside … Read More → "When the Walls Get Too Thin"

Electronic system level (ESL) design has struggled to convince doubters that it’s more than a marketing TLA. But the most visibly productive ESL tools in recent years have been those that synthesize C into lower-level RTL. Doing logic synthesis from C has been a long-time vision for raising the level of abstraction of design. But the history of the technology, which predates the ESL phenom, is checkered and has left a sour taste in many designers’ mouths. Each new offering has had to convince rather dubious prospects that they were different from what had … Read More → "ESL Gets a New Taker"

A few weeks ago we started a look at Logic Non-Volatile Memory (Logic NVM) options. These are non-volatile memories intended for embedding in SoCs using only standard logic processes instead of the more complicated processes designed to optimize large quantities of memory. We looked at one-time programmable (OTP) versions, which, not too surprisingly, can be programmed only once. We also looked at multiple-time programmable (MTP) versions, which can in general be programmed 100,000+ times while maintaining a data retention time of 10 years or more even on the 100,000th programming.

But there’s another … Read More → "A Non-Volatile Middle Ground"