Articles – Page 314

Pentek Triples Number of Cobalt High-Performance Xilinx Virtex®-6 FPGA Modules for Radar and Communication Applications

September 28, 2010

Extends A/D and D/A sampling rates to 1 GHz
Embedded IP delivers turnkey software radio solutions
GateFlow Design Kit speeds integration of custom IP
FPGA device options offer scalable performance
All modules now shipping from stock

UPPER SADDLE RIVER, NJ–September 28, 2010& … Read More → "Pentek Triples Number of Cobalt High-Performance Xilinx Virtex®-6 FPGA Modules for Radar and Communication Applications"

Drive Safely

by Dick Selwood

September 28, 2010

Many years ago I read a book about motor racing in which a secret team put together a car that went on to win the Le Mans 24-hour race. The whole car was built from scratch, with a cast iron block drilled for cylinders, metal turned on a lathe for the wheels, and so on. This may, at a stretch, have been feasible for a one-off vehicle, but it was never an option once production line manufacture started. Henry Ford brought in components, even for the Model T, although the wonderful story that the packing cases in which … Read More → "Drive Safely"

Moving Beyond Simulation

by Bryon Moyer

September 28, 2010

Traditionally, simulation-based dynamic verification techniques — think directed tests, constrained-random simulation and the like — have collectively been the workhorse of functional verification. But it’s fair to say that this horse is straining under the load and in need of some relief. The source of this strain: increasing SoC integration and overall complexity. This, in turn, drives up verification costs. Software licenses, hardware servers and staff to set up and run regression environments all cost real money, which of course remains scarce given the tepid economy. Even with unlimited resources, due to that increasing design complexity, more and … Read More → "Moving Beyond Simulation"

Achieving One TeraFLOPS with 28nm FPGAs

by Kevin Morris

September 27, 2010

Due to recent technological developments, high-performance floating-point signal processing can, for the first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal processing has been implemented using fixed-point operations. This white paper describes how floating-point technology on FPGAs is not only practical now, but that processing rates of one trillion floating-point operations per second (teraFLOPS) are feasible—and on a single FPGA die.

… Read More →

Achieving 1-TFLOPS Performance with 28nm FPGAs (WEBCAST)

by Kevin Morris

September 27, 2010

Is 1 TFLOPS possible on a single FPGA? At 28 nm, Altera’s Stratix V FPGA, with its uniquevariable-precision digital signal processing (DSP) architecture, is equipped to deliver thisperformance level. This architecture combines the implementation efficiency of common DSPfunctions such as fast Fourier transforms (FFTs) and finite impulse response (FIR) with the bestsupport for higher precision and floating-point signal processing.

Watch this 30-minute webcast to learn how:

Read More → "Achieving 1-TFLOPS Performance with 28nm FPGAs (WEBCAST)"

MIPS Technologies’ New Processor Provides Fastest Fully-Synthesizable Multicore IP

by Kevin Morris

September 27, 2010

SUNNYVALE, Calif. – September 27, 2010 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, today introduced a new processor that offers industry-leading speed for fully-synthesizable multicore IP. With the MIPS32® 1074K™ Coherent Processing System (CPS), companies can now get the high performance of a custom implementation with an off-the-shelf CPU core. The 1074K CPS is the next step in the evolution of MIPS Technologies’ coherent multiprocessing (CMP) platforms, hitting the top end of MIPS’ performance lineup in a compact … Read More → "MIPS Technologies’ New Processor Provides Fastest Fully-Synthesizable Multicore IP"

AppliedMicro PacketPro™ Multicore Processor Family Provides Intelligent SoC Management for Embedded Applications

by Kevin Morris

September 27, 2010

SUNNYVALE, Calif. – Sept. 27, 2010 – Applied Micro Circuits Corporation (NASDAQ:AMCC), or AppliedMicro, today announced its next-generation PacketPro™ multicore processor System-on-a-Chip (SoC) family, designed with advanced subsystem and offload acceleration hardware to enable new levels of security, high availability, low latency, and power management for embedded applications.

PacketPro is AppliedMicro’s second-generation embedded processor SoC family and the first to feature offload of critical features for multiple PowerPC® processors with frequency capabilities ranging in performance from 600 MHz to 2.0 … Read More → "AppliedMicro PacketPro™ Multicore Processor Family Provides Intelligent SoC Management for Embedded Applications"

Cortus and RivieraWaves Partner to Provide Complete Bluetooth® Low Energy and Classic Bluetooth® BR/EDR Low Power Platforms

by Kevin Morris

September 27, 2010

Montpellier, France, 27th September 2010.Cortus and RivieraWaves announce a partnership providing a range of complete, turnkey, easy to integrate, Bluetooth IP solutions.

One of the Platforms, coming out of this partnership, is a complete, fully qualified, Bluetooth Low Energy solution, specifically designed for ultra low power systems requiring exceptionally long battery life.

The IP is a complete solution combining RivieraWaves’ RF, modem and baseband hardware and the protocol stack running on the integrated APS3 processor from Cortus. All these elements form a common reference platform including bus system, memory interfaces and … Read More → "Cortus and RivieraWaves Partner to Provide Complete Bluetooth® Low Energy and Classic Bluetooth® BR/EDR Low Power Platforms"

Synopsys Enhances Synplify FPGA Synthesis Software With up to 4X Faster Runtime and New Team-Design Capabilities

by Kevin Morris

September 27, 2010

2010.09 Release Highlights:

Up to 4X synthesis runtime improvement
New global placer for quality of results improvements on existing designs
New team-design feature for concurrent design development
New support for DesignWare Library datapath and building block components for FPGA Implementation and ASIC Prototyping

Lattice Semiconductor Announces Video Display Interfaces Suite For HDMI, DVI, And 7:1 LVDS

by Kevin Morris

September 27, 2010

HILLSBORO, OR – SEPTEMBER 27, 2010 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of a comprehensive video display interfaces suite for High-Definition Multimedia Interface (HDMI 1.3a), Digital Visual Interface (DVI), and 7:1 LVDS Interface. All of these display interfaces are available as free Reference Designs for the award winning, mid-range LatticeECP3™, while selected free Reference Designs can also be ported to … Read More → "Lattice Semiconductor Announces Video Display Interfaces Suite For HDMI, DVI, And 7:1 LVDS"