The MachXO2 family offers designers of low-density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Built on a low power 65-nm process featuring embedded Flash technology, the MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the prior generation MachXO family.  In addition, several popular functions used in low-density PLD  applications, such as user Flash memory (UFM), I2C, SPI and timer/counter,  have been hardened into the MachXO2 devices, providing designers a “Do-it-All-PLD” for low density applications. MachXO2 devices are sampling today.

In this webcast, we’ll take a look at some of the typical system and consumer application requirements, and see how MachXO2 devices address these requirements. We’ll also talk about the MachXO2 PLD feature set and discuss some of the available tools that enable you to evaluate and start designing with MachXO2 devices.