Shanghai, China – July 26, 2010 – The annual SoC IP Symposium is China’s premier show to feature the latest technology and product information for the SoC design community. This year’s show, which was held in Shanghai and Beijing in June, attracted over 300 qualified attendees and 14 exhibitors. The show is organized by S2C, a leading rapid SoC prototyping company, headquartered in San Jose, CA with development and support centers in Shanghai and Beijing. 

This one day show allows for attendee interaction with the IP and design service vendors in both question and answer sessions and vendor-attendee interaction at the exhibit portion of the show. Attendees have the opportunity to share their design specifications and challenges and explore solutions with the vendors. S2C, as the organizer, thanks all the exhibitors, and media for their participation in making SoCIP2010 a valuable resource for the SoC design community.  

The SoCIP show is an important platform for SoC design community. The key reason is the history of the industry. After years of development of the semiconductor industry, the market has segmented into increasingly fine division of services and silicon IP, from the earliest IDM to the broad spectrum of IC design and design service companies, IP providers, and semiconductor foundries. The SoC designer is faced with an ever increasing array of potential solutions to their design problems. SoCIP success is largely due to a rapidly growing Chinese SoC industry. As the organizer of the show, S2C not only understands the IP needs of the industry but is familiar with the best in class foreign suppliers to help customers select the best solutions in China to meet their SoC and IP design solutions.  

In China, the chip design industry and government support are inseparable. In 2008, in the face of the global economic crisis, the Chinese Government made a series of initiatives to strongly support a variety of IC projects, which brought a large demand for silicon IP.  The National Software and Integrated Circuit Public Service Platform (CSIP) Deputy Director Qiu Shanqin was invited to participate in SoCIP 2010 and gave the keynote speech “Build SoC Reference Platforms to Promote the Use of Silicon IP in different Applications.” This demonstrates the Government’s active support of the silicon IP industry in China.  

The show theme “The Era of Designing with System Prototyping IP” highlights that SoC design methodologies shows a new trend that is a common FPGA prototype platform that facilitates IP development, demonstration, evaluation, integration even SoC verification. This design methodology has been widely recognized by exhibitors and visitors. In SoCIP 2010, there were a number of IP vendors using S2C’s TAI Logic Module to as a prototype design and verification platform utilizing Prototype Ready IP™, such as CAST, Northwest, Innosilicon.. This platform enables SoC designers to facilitate IP evaluation and verification throughout the design saving up to 6 months of project development time.  

Exhibitors voiced overwhelmingly positive responses to the show. Renesas MCU Products Electronic Marketing Manager Zhou Shao Xiang said: “This is our first time SoCIP seminar exhibition, we are pleased to see so many industry participants, it is indeed a good opportunity for our customers to visit face to face.” Another Cosmic’s Analog IP director Sundararajan Krishnan said “a great organization. It was all related customers, great, I hope next year to invite more customers.” We also have a lot of audience feedback, Huawei, Mr. Lin said, “the show focused on a number of IP Vendor, I get a lot of information. Exhibition of the atmosphere is very relaxed and a lot of interaction.” Mr. Mao from Beijing Vimicro said: “SoCIP2010 show was well prepared to the vendor presentations had good effects.”  

SoCIP Future

SoCIP is becoming a full-year SoC design platform for SoC design professionals to obtain the latest IP and SoC design technical advice, and share design techniques on building systems and chip innovations. In 2010, SoCIP there will be a series of seminars, including Shenzhen Sep 7th, Chengdu Sep 8th, Xi’an Sep 10th.  In addition, the www.socip.org website will be enhanced to provide up to date news releases and technology blogs on the SoC industry.  

About SoCIP

SoCIP aims to serve the SoC design community by providing technologies and product information that enable precise SoC-building on the first try. Our vision is for a designer to rapidly assemble a SoC prototype by using commercial IP with minimal up-front cost, validate that the function is correct and then find the right Services provider to turn the prototype into a real silicon – all this is done to ensure that your SoC investment will give strong returns. SoCIP is organized by S2C Inc. www.s2cinc.com and sponsored by leading silicon IP and SoC design technologies companies around the world. For more information about SoCIP 2010 or to register, please visit www.socip.org.  

About S2C

Founded and headquartered in San Jose, California, S2C has been successfully delivering rapid SoC prototyping tools since 2003.  S2C provides: 

• Rapid SoC FPGA-based prototyping hardware systems plus design and verification software.
• Third-party Prototype Ready IP™
• SoC design, prototype and production services

S2C’s value proposition is our highly qualified engineering team and customer-focused sales force that understands our customers’ commercial SoC development needs.  S2C’s unique FPGA-based electronic system level (ESL) solution, using our patented TAI IP technology, enables designers to quickly assemble FPGA-based SoC prototypes on S2C FPGA boards easily and securely. This enables customers to start software development, typically the long pole item in development schedules, immediately.  Combining rapid prototyping methodologies with a comprehensive portfolio of Prototype Ready IP and advanced design solutions, S2C can reduce the SoC design cycle by up to nine months.   

S2C currently has 3 direct offices located in Shanghai, Beijing and Shenzhen to meet the demand for accelerated SoC design activities in China. S2C is also the organizer of the annual SoCIP seminar and exhibition in China, which brings SoC designers/professionals from the Asia-Pacific region together with international silicon IP and SoC solution vendors. For more information, visit www.s2cinc.com.  

SAN JOSE, Calif., July 26 /PRNewswire-FirstCall/ — Altera Corporation (NASDAQ:ALTR) today announced that its Stratix® V family of FPGAs is optimized to support Micron Technology’s next-generation reduced-latency DRAM (RLDRAM® 3 memory). Stratix V FPGAs feature a new memory architecture that delivers the FPGA industry’s highest system performance with low latency and high efficiency. Stratix V FPGAs provide networking equipment manufacturers with a memory interface solution capable of transferring voice, video and data across the Internet quickly and efficiently.

“Micron’s next-generation RLDRAM 3 memory is designed specifically to meet the requirements of today’s high-bandwidth networking applications and enable a faster, more efficient transfer of data over the network,” said Bruce Franklin, senior business development manager for Micron. “Our long-standing relationship with Altera, combined with their commitment to providing high-performance FPGA solutions, is giving designers an effective pathway to more easily implement our leading reduced-latency memory.”

Stratix V FPGAs deliver a high-throughput memory interface to external memory devices such as RLDRAM 3. All of the critical circuits in the device’s read/write path are hardened to simplify timing closure at very high frequencies. To complement Stratix V FPGAs, Altera offers memory controller cores and associated design software that automatically reduces design cycle time when working with external memories.

“Altera and Micron have worked together for years on advancing the system throughput of our bandwidth-constrained customer base by improving the latency and performance of the FPGA memory interface. This enables our customers to get to market quickly with highly differentiated solutions,” said Luanne Schirrmeister, senior director of component product marketing at Altera. “The new innovations made to the Stratix V memory architecture enable us to deliver the most efficient memory interface targeting today’s highest performance networking applications.”

About Altera

Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera’s FPGA, CPLD and ASIC devices at www.altera.com. Follow Altera via Facebook, RSS and Twitter.