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Ultra High-Performance MIPS64® Architecture Powers Cavium Networks’ New Multi-Core Processors

SUNNYVALE, Calif. – May 11, 2010  MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced that its MIPS64® architecture is powering the new OCTEON® IICN68XX/67XX processor families introduced today by Cavium Networks (NASDAQ: CAVM). The new processors integrate 8 to 32 enhanced MIPS64 cores with up to 48GHz of 64-bit compute power in a single chip, delivering high performance and application acceleration for borderless enterprise, mobile internet infrastructure, secure data center and cloud computing applications. The new processors also deliver a high level of power efficiency with new technology that dynamically adjusts power based on the application-level processing requirement.

“MIPS is the architecture of choice for networking and communications applications, delivering ultra high-performance, energy efficiency and an unsurpassed ecosystem for these applications,” said Syed Ali, president and CEO, Cavium Networks. “Through our close relationship with MIPS Technologies and the openness and flexibility of the MIPS® architecture, we are delivering groundbreaking processors with an unprecedented level of compute power. We are seeing increasing adoption of our OCTEON processors among a wide range of Tier-1 companies. We are also aggressively expanding our served markets across the Enterprise, Data Center and Service Provider segments.”

“Cavium Networks is creating some of the industry’s most advanced products for networking, communications and storage applications,” said Sandeep Vij, president and CEO, MIPS Technologies. “Due largely to the innovation of MIPS architectural licensees like Cavium Networks, the MIPS architecture is displacing the competition in the networking market. As data traffic increases across wired and mobile networks, companies are increasingly looking to MIPS to provide the high performance and efficiency needed for the next generation of products.”

Cavium’s MIPS-Based™ OCTEON II products are supported by more than 50 tier-1 partners providing operating systems and tools, software applications/stacks, debuggers, complementary silicon, ATCA and hardware appliances, consulting, and other products and services.

The MIPS64 architecture sets a new performance standard for 64-bit MIPS-Based embedded processors. By incorporating powerful features, standardizing privileged mode instructions, supporting past ISAs and providing an upgrade path from the MIPS32® architecture, the MIPS64 architecture provides a solid high-performance foundation for future MIPS processor-based development.

About Cavium Networks:

Cavium Networks is a leading provider of highly integrated semiconductor products that enable intelligent processing for networking, communications, and the digital home. Cavium Networks offers a broad portfolio of integrated, software-compatible processors ranging in performance from 100 Mbps to 40 Gbps that enable secure, intelligent functionality in enterprise, data-center, broadband/consumer and access and service provider equipment. Cavium Networks processors are supported by ecosystem partners that provide operating systems, tool support, reference designs and other services. Cavium Networks principal offices are in Mountain View, CA with design team locations in California, Massachusetts, India and Taiwan. For more information, please visit: http://www.caviumnetworks.com.

About MIPS Technologies, Inc. (www.mips.com):

MIPS Technologies, Inc. (NasdaqGS: MIPS) is a leading provider of industry-standard processor architectures and cores that power some of the world’s most popular products for the home entertainment, communications, networking and portable multimedia markets. These include broadband devices from Linksys, DTVs and digital consumer devices from Sony, DVD recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco, 32-bit microcontrollers from Microchip Technology and laser printers from Hewlett-Packard. Founded in 1998, MIPS Technologies is headquartered in Sunnyvale, California, with offices worldwide.

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Lattice Semiconductor Plans SRIO Interoperability With Cavium Networks’ OCTEON II Processors

HILLSBORO, OR — MAY 11, 2010 — Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced plans to interoperate between Cavium Networks’ (NASDAQ: CAVM) OCTEON® II CN63XX processors and the LatticeECP3™ FPGA family via a Serial Rapid IO (SRIO) Specification 2.1 link. SRIO is commonly used in 3G/4G wireless base stations and wireline switches and routers where low latency is critical. Cavium’s OCTEON II processor incorporates two to six cnMIPS64® cores, the most advanced third generation hardware acceleration, and SERDES-based I/Os, including SRIO. Lattice’s ECP3 device boasts the lowest power in a mid-range FPGA family, rich memory density, DSP blocks and SERDES I/Os capable of supporting SRIO.

Cavium and Lattice have already begun executing their plan to demonstrate SRIO interoperability, and both companies will announce updates as they become available. “The addition of the SRIO interface in the OCTEON II processors, along with the wide variety of other standards-based interfaces, provides a new low-latency connectivity option,” said Tasha Casta?eda, Senior Strategic Alliance Manager, Cavium Networks. “We are pleased to add Lattice to Cavium’s PACE (Partnership to Accelerate Customer End-solutions) ecosystem in order to offer our customers a strong FPGA design solution.”

“Lattice is excited to be working with Cavium Networks. This SRIO interoperability testing will strengthen our rich portfolio of wireless IP. We are working to introduce future bridging applications for the OCTEON II and our ECP3 family, including SRIO to CPRI, SRIO to PCIe and SRIO to SGMII,” said Ted Marena, Director of Business Development for Lattice.

About Cavium Networks

Cavium Networks is a leading provider of highly integrated semiconductor products that enable intelligent processing for networking, communications and the digital home. Cavium Networks offers a broad portfolio of integrated, software-compatible processors ranging in performance from 10 Mbps to 40 Gbps that enable secure, intelligent functionality in enterprise, data-center, broadband/consumer and access and service provider equipment. Cavium Networks processors are supported by ecosystem partners that provide operating systems, tool support, reference designs and other services. Cavium Network’s principal offices are in Mountain View, CA with design team locations in California, Massachusetts, India and Taiwan. For more information, please visit: http://www.caviumnetworks.com.

About Lattice Semiconductor

Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com

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