feature article
Subscribe Now

Targeting and Retargeting Guide for Spartan-6 FPGAs

Due to differences in the base architecture of the Spartan-6 device from previous FPGA generations, selection of the right Spartan-6 device for a given design is not always straightforward. Spartan-3 FPGA part numbers reflect system gates while Spartan-6 FPGA part numbers reflect approximate logic cell count divided by 1,000. Also, Spartan-6 devices use different ratios of block RAMs, multiplier/DSP blocks, DCMs, and pins.

Compare the feature summary tables in DS160, Spartan-6 Family Overview, DS099, Spartan-3 FPGA Family Data Sheet, DS312, Spartan-3E FPGA Family Data Sheet, and DS706, Extended Spartan-3A Family Overview, for details on the resources and architectures of Spartan-3 and Spartan-6 devices.

Beyond LUTs and flip-flops, each new generation of Xilinx FPGAs tends to include larger block functionality over previous generations, and the Spartan-6 FPGA is no exception. The Spartan-6 architecture includes an integrated memory controller, integrated PCI Express® logic, and gigabit transceivers. In Spartan-6 devices, the 18 Kb block RAMs can be split into two 9 Kb RAMs, which allow for greater utilization in designs not requiring deep memory structures. Compared with devices earlier than Spartan-3A DSP devices, the DSP48A1 slice adds additional functionality over the MULT18X18 primitive as well. The use of such functions compared to prior families adds capabilities not reflected in the logic cell count of the device. This can reduce the logic count as well as reduce the amount of block RAMs, multipliers, I/Os, and other resources. All of these subjects should be considered when determining device selection.

Author: Brian Philofsky, Software Technical Marketing Engineer, Xilinx

Leave a Reply

featured blogs
Jul 25, 2025
Manufacturers cover themselves by saying 'Contents may settle' in fine print on the package, to which I reply, 'Pull the other one'”it's got bells on it!'...

featured paper

Agilex™ 3 vs. Certus-N2 Devices: Head-to-Head Benchmarking on 10 OpenCores Designs

Sponsored by Altera

Explore how Agilex™ 3 FPGAs deliver up to 2.4× higher performance and 30% lower power than comparable low-cost FPGAs in embedded applications. This white paper benchmarks real workloads, highlights key architectural advantages, and shows how Agilex 3 enables efficient AI, vision, and control systems with headroom to scale.

Click to read more

featured chalk talk

Industrial Internet of Things
Sponsored by Mouser Electronics and CUI Inc.
In this episode of Chalk Talk, Amelia Dalton and Bruce Rose from CUI Inc explore power supply design concerns associated with IIoT applications. They investigate the roles that thermal conduction and convection play in these power supplies and the benefits that CUI Inc. power supplies bring to these kinds of designs.
Aug 16, 2024
50,963 views