At 40 and 45 nm process nodes, power has become the primary factor for FPGA selection. This white paper details how Xilinx designed for this new reality in its recently introduced Spartan®-6 (45 nm) and Virtex®-6 (40 nm) FPGA families, achieving dramatic power reductions over previous generation Spartan-3A and Virtex-5 devices.

Accomplishing such a significant reduction in power consumption required major engineering innovations. At 40 and 45 nm, transistor leakage increases exponentially, making static power a major challenge. Additionally, the desire for higher performance continues to drive core clock rates higher, increasing dynamic power. This white paper describes how Xilinx addressed theses challenges by using engineering innovations in Spartan-6 and Virtex-6 FPGAs that keep these families ahead of the curve.