News – Page 2241 – EEJournal

Curtiss-Wright Controls Electronic Systems’ New Rugged Rack Mount Chassis Cool >150W Per Slot

May 25, 2011

LITTLETON, MA – May 24, 2011 — Curtiss-Wright Controls Electronic Systems (CWCES), a business group of Curtiss-Wright Controls and a leading designer and manufacturer of rugged deployed subsystems for the aerospace, defense and commercial market, has introduced two new 20-slot 0.8” pitch or 16-slot 1.0” pitch 6U payload forced air-cooled enclosures for rugged deployed military embedded systems. The RM810 chassis are the newest … Read More → "Curtiss-Wright Controls Electronic Systems’ New Rugged Rack Mount Chassis Cool >150W Per Slot"

48th DAC: Atrenta, Cadence and SpringSoft Sponsor Free Exhibits Floor Passes and I LOVE DAC campaign

May 25, 2011

LOUISVILLE, Colo. – May 25, 2011 – Offering a unique opportunity to enter the 48th Design Automation Conference (DAC) for free, Atrenta, Cadence, and SpringSoft are sponsoring three-day exhibits passes through the third annual ‘I LOVE DAC’ campaign at DAC. DAC is the premier conference devoted to design and design automation of electronic systems. The conference and exhibition will be held at the San Diego Convention Center in San Diego, California, from June 5-9, 2011.

“Let’s face it, DAC is the … Read More → "48th DAC: Atrenta, Cadence and SpringSoft Sponsor Free Exhibits Floor Passes and I LOVE DAC campaign"

Tanner EDA Unveils HiPer Silicon v16 with Open Access at DAC 2011

May 25, 2011

MONROVIA, California – May 25, 2011 — At DAC 2011, Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will demonstrate a special pre-release version of their full-flow tool suite for analog IC and MEMS designers, HiPer Silicon v16. The company will also be presenting two exhibitor forums, participating in a panel on analog process design kits (PDKs), and sponsoring the 5^th annual IPL luncheon. The 48^th Design Automation Conference (Read More → "Tanner EDA Unveils HiPer Silicon v16 with Open Access at DAC 2011"

Extreme DA and ATopTech Announce Partnership for Timing Sign-off Closure

May 25, 2011

Santa Clara, Calif. – May 25, 2011 — Extreme DA^™, the leader in new-generation timing analysis software and ATopTech^TM, Inc., the leader in next generation physical design solutions, today announced a partnership for timing sign-off closure. Extreme DA is licensing its timing analysis and sign-off technology to ATopTech for analysis correlation of leading edge digital integrated circuit (IC) designs. The accuracy and completeness of timing analysis is essential to the success of digital designs that will become working integrated circuits (ICs). Joint customers … Read More → "Extreme DA and ATopTech Announce Partnership for Timing Sign-off Closure"

Analog Bits Partnership Program Collaborates To Ensure Next Generation Success

May 25, 2011

Mountain View, CA May 24, 2011 Analog Bits, the Integrated Clocking and Interface IP leader, has launched its Analog Partner Program (APP) to enhance the semiconductor design ecosystem prioritizing first-time silicon success among its analog partners.

Companies collaborating through the APP initiative include design service company Accent, ASIC and derivative SOC developer Global Unichip Corp., ASIC and derivative SoC developer Open-Silicon, the Europe-based research organization IMEC, and Asia-based Alchip, Fujitsu Semiconductor Limited, and
SOCLE.

Accelerating time-to-market at 28nm

The new initiative addresses many of the challenges … Read More → "Analog Bits Partnership Program Collaborates To Ensure Next Generation Success"

EVE, Xena Networks Link Hardware-Assisted Verification Platform with Ethernet Testing Solution

May 25, 2011

SAN JOSE, CALIF. –– May 25, 2011 –– EVE, the leader in hardware/software co-verification, and Xena Networks of Copenhagen, Denmark, jointly announced today a strategic development partnership where EVE’s best-in-class ZeBu hardware-assisted verification family has been integrated with Xena’s high-density Ethernet testing solution.

Xena’s gigabit Ethernet tester is used for load-stress and functional testing of Ethernet equipment and network infrastructure. The integration of XenaBay and XenaCompact testers with ZeBu (for zero bugs) emulation delivers a comprehensive and cost-effective Ethernet testing system for next-generation Ethernet switch chips.& … Read More → "EVE, Xena Networks Link Hardware-Assisted Verification Platform with Ethernet Testing Solution"

Wide VIN Range Flyback Controller is Specified over a -55°C to 150°C Junction Temperature Range

May 25, 2011

MILPITAS, CA – May 25, 2011 – Linear Technology Corporation announces the high reliability (MP-grade) version of the LTC3805/-5, a programmable frequency flyback controller that operates over a -55°C to 150°C junction temperature range. This high-performance shunt regulated input voltage PWM (pulse width modulation) controller enables for wide input voltages ranging from 5V to off-line applications and is … Read More → "Wide VIN Range Flyback Controller is Specified over a -55°C to 150°C Junction Temperature Range"

Forza Selects Berkeley Design Automation Analog FastSPICE™ Platform

May 25, 2011

SANTA CLARA, CA, —May 24, 2011— Berkeley Design Automation, Inc., the nanometer circuit verification leader, today announced that Forza Silicon Inc., a fabless semiconductor company specializing in high-resolution, high-speed CMOS image sensors, has selected the company’s Analog FastSPICE Platform for full-circuit verification and block-level characterization.

“The CMOS image sensors we design have tremendous verification challenges,” said Daniel Van Blerkom, Ph.D., CTO at Forza Silicon. “We selected AFS because it can handle verification of our CMOS image … Read More → "Forza Selects Berkeley Design Automation Analog FastSPICE™ Platform"

Advantech Expands Performance Features on Its Newest MICA-101 Mobile Clinical Assistant

May 25, 2011

Irvine, California, May 18, 2011 – Advantech, a global embedded computing leader, is happy to announce a new generation of the MICA-101 mobile clinical assistant. The new MICA-101 (Version C) has the same integrated features and ergonomic design as its predecessor, but the new release has been enhanced to provide better imagery, faster storage, and better power, making it even more robust. MICA-101 mobile clinical assistant is suitable for EMR, HER, and Nursing Information Systems (NIS). It is a fanless system that is lightweight, portable and quiet to use, and it streamlines workflow while increasing productivity.

< … Read More →

Aldec Delivers 4 MHz Design Emulator with Extensive Debugging Support

May 25, 2011

Henderson, NV (US) – May 23, 2011 — Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, enhances HES™ (Hardware Emulation Solutions) by expanding its debugging capabilities, ASIC gate capacity and speed of operation.

The new release of HES Design Verification Manager software, DVM™ 2011.04, supports SCE-MI 2.0 standard and provides 4 MHz emulation speed for designs with 10 million ASIC gates. The new version of DVM automates the entire design setup process including the insertion of SCE-MI transactors into the user’s design and SCE-MI API functions to interface with … Read More → "Aldec Delivers 4 MHz Design Emulator with Extensive Debugging Support"