industry news archive
Subscribe Now

Synopsys Invites Cadence Incisive and Mentor Graphics Questa Users to the Verification FastForward Program

MOUNTAIN VIEW, Calif., Feb. 3, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the verification FastForward migration program.  The program helps Cadence® Incisive® and Mentor Graphics® Questa® users to migrate to the VCS® functional verification solution and benefit from its superior technologies.  These include: innovative performance engines; the industry’s broadest SystemVerilog support for VMM, OVM, and the UVM methodologies; a powerful constraints solver; new coverage closure technologies; unique low power verification capabilities; and a rich portfolio of verification IP.   … Read More → "Synopsys Invites Cadence Incisive and Mentor Graphics Questa Users to the Verification FastForward Program"

Avago Technologies Premieres New 30-Gbps 28-nm ASIC Embedded SerDes Using LeCroy WaveMaster 8 Zi-A Oscilloscope at DesignCon 2011

Chestnut Ridge, NY and Santa Clara, CA, January 31, 2011 – LeCroy Corporation announced today that Avago Technologies will use LeCroy’s WaveMaster 8 Zi-A Oscilloscope to demonstrate 30-Gbps performance with its new Serializer/Deserializer (SerDes) core in 28-nm process technology.  The demonstration will take place in the LeCroy booth (#307) at the DesignCon 2011 exhibition in the Santa Clara Convention Center in Santa Clara, California from February 1-2.

LeCroy is honored that Avago chose its WaveMaster 8 Zi-A to provide the record-breaking bandwidth and signal fidelity needed to support their new high speed technologies,” said President and Chief … Read More → "Avago Technologies Premieres New 30-Gbps 28-nm ASIC Embedded SerDes Using LeCroy WaveMaster 8 Zi-A Oscilloscope at DesignCon 2011"

Agilent Technologies Introduces Power Integrity Solution to Solve Key Challenge in Designing Power Distribution Networks

SANTA CLARA, Calif., Feb. 1, 2011 – Agilent Technologies Inc. (NYSE:A) today introduced its power integrity solution to quickly and accurately solve the perforated-plane power integrity challenge. Available in Agilent’s Advanced Design System 2011 Momentum, the solution is used for designing a power distribution network with the heavily perforated power and ground planes found in modern printed circuit board designs.

Traditionally, boards have had dedicated power and ground planes … Read More → "Agilent Technologies Introduces Power Integrity Solution to Solve Key Challenge in Designing Power Distribution Networks"

Swissbit announces world’s first 1GB & 2GB DDR3 RS-UDIMM Rugged Small Outline Memory Module

Bronschhofen, Switzerland – February 2, 2011 – Swissbit is proud to announce world’s first DDR3 RS-UDIMM (Rugged Small Outline unbuffered ECC DIMM): This small form factor (38 x 67.5mm) memory module has been developed with special focus on rugged industrial and embedded system for tough environmental conditions requiring exceptional resistance to shock and vibration.

Swissbit’s DDR3 240-pin 72-bit RS-UDIMMs are electrically compatible to the JEDEC DDR3 72bit SODIMM and target the latest Intel based embedded platforms as well as other DDR3 ECC capable applications for speed grades of  … Read More → "Swissbit announces world’s first 1GB & 2GB DDR3 RS-UDIMM Rugged Small Outline Memory Module"

AdaCore Releases New GNATemulator Tool for Efficient Embedded Software Testing

PARIS and NEW YORK, February 1, 2011 – AdaCore, a leading supplier of Ada development tools and support services, today announced the release of GNATemulator, an efficient and flexible emulator solution for testing embedded software applications. Based on the QEMU technology, a generic and open source machine emulator and virtualizer, the new GNATemulator tool allows software developers to compile code directly for their target architecture and run it on their host platform, through an approach that translates from the target object code to native instructions on the … Read More → "AdaCore Releases New GNATemulator Tool for Efficient Embedded Software Testing"

Xilinx Acquires AUTOESL To Enable Designer Productivity And Innovation With FPGAs And Extensible Processing Platform

SAN JOSE, Calif, Jan. 31, 2011 –Xilinx, Inc. (NASDAQ: XLNX ), the world’s leading provider of programmable platforms, today announced the acquisition of high level synthesis leader AutoESL Design Technologies, Inc.

Expanding Xilinx’s technology foundation and product portfolio to include high level synthesis will enable the company to deliver the benefits of programmable platforms to a broader base of companies where system architects and hardware designers are accustomed to designing at a higher level of abstraction in C, C++ and System C. It will also enable Xilinx to address growing customer demand for tools that … Read More → "Xilinx Acquires AUTOESL To Enable Designer Productivity And Innovation With FPGAs And Extensible Processing Platform"

Xilinx Experts to Discuss Through Silicon Vias, Signal Integrity, Design Methodologies and FPGA-based SoC Development at DesignCon 2011

SAN JOSE, Calif., Jan. 31, 2011 /PRNewswire/ — Xilinx, Inc. (Nasdaq: XLNX) today announced itsparticipation at DesignCon 2011 in Santa Clara, California from January 31 through February 3,2011. Throughout the week, Xilinx experts will share their insight about overcoming designchallenges, improving signal integrity problems, understanding Through Silicon Via (TSV) processes,and meeting chip to chip I/O demands. Xilinx will also be exhibiting demos with MoSys, SiSoft, andAgilent, all featuring Xilinx’s Virtex®-6 HXT FPGA. Xilinx Senior Vice President and Chief ofTechnology Officer, Ivo Bolsens, will keynote on how the industry is entering an era of crossover SoCs.

What:Read More → "Xilinx Experts to Discuss Through Silicon Vias, Signal Integrity, Design Methodologies and FPGA-based SoC Development at DesignCon 2011"

Synopsys Collaborates with Industry Consortium on Solutions to Model Latest 28-nm Parasitic Effects

MOUNTAIN VIEW, Calif., Feb. 1, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced new extensions to its open source-licensed Interconnect Technology Format (ITF) which enables modeling of more complex device structures and interconnect layers for parasitic extraction tools at 28-nanometer (nm) and below process technologies.  Synopsys collaborated with the members of the Interconnect Modeling Technical Advisory Board (IMTAB) of the IEEE Industry Standards and Technology Organization (IEEE-ISTO) to define these new extensions, which have been ratified by IMTAB members including Altera Corporation, AMD, Apache Design Solutions, GLOBALFOUNDRIES, … Read More → "Synopsys Collaborates with Industry Consortium on Solutions to Model Latest 28-nm Parasitic Effects"

featured blogs
May 20, 2019
The Loch Ness Monster? There’s that old, grainy picture. Big Foot? I’ve seen the video. UFO’s? Who knows? But micro, rugged industrial connectors? Come on, that’s really hard to believe … But, industrial electronics is Samtec'€™s largest sellin...
May 20, 2019
Next week – Wednesday 29 May – I am presenting a technical webinar, looking at multicore issue. In particular, we will be looking at a number of benefits of a multicore design including how it can help reduce certification costs and effort '€¦ Here is the abstra...
May 20, 2019
At the 2019 International Symposium of Physical Design, the conference honored Alberto Sangiovanni-Vincentelli with a lifetime achievement award. Alberto was one of the cofounders of SDA Systems, the... [[ Click on the title to access the full blog on the Cadence Community s...
Jan 25, 2019
Let'€™s face it: We'€™re addicted to SRAM. It'€™s big, it'€™s power-hungry, but it'€™s fast. And no matter how much we complain about it, we still use it. Because we don'€™t have anything better in the mainstream yet. We'€™ve looked at attempts to improve conven...