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MoSys Participates at The Linley Group’s Tech Processor Conference

Who:         MoSys (NASDAQ: MOSY), a leading provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is participating at The Linley Group’s Tech Processor Conference, which focuses on networking and communications. Michael Miller, Vice President of Technology Innovation and System Applications at MoSys,will be a panelist on the second day of the conference in Session 5: Scaling Processing to 100Gbps. This session, which begins at 9 a.m., will be moderated by Linley Gwennap, principal analyst at The Linley Group. Presenters will describe products and technologies capable of data rates beyond 40 Gbps.

What:       The Linley Tech Processor Conference returns to San Jose. This two-day event focuses on processors and related technologies for networking and communications applications. Industry leaders will deliver in-depth information on the newest chips and technologies. Attendees will hear presentations addressing various types of processor architecture and design, semiconductor intellectual property and related technologies used in these applications.

When:       September 27–28, 2010 beginning at 8:15 a.m. On September 27 at 5 p.m. there will be a reception and exhibits.

Where:    Doubletree Hotel San Jose

2050 Gateway Place
San Jose, CA 95110

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is a leading provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs. MoSys’ Bandwidth Engine™ family of ICs combines the company’s patented 1T-SRAM® high-density memory technology with its high-speed 10 Gigabits per second (Gbps) SerDes interface (I/O) technology. A key element of Bandwidth Engine technology is the GigaChip™ Interface, an open, CEI-11 compatible interface developed to enable highly efficient serial chip-to-chip communications. MoSys’ IP portfolio includes SerDes IP and DDR3 PHYs that support data rates from 1 – 11 Gbps across a variety of standards. In addition, MoSys offers its flagship, patented 1T-SRAM and 1T-Flash® memory cores, which provide a combination of high-density, low power consumption, high-speed and low cost advantages for high-performance networking, computing, storage and consumer/graphics applications. MoSys IP is production-proven and has shipped in more than 325 million devices. MoSys is headquartered in Santa Clara, California. More information is available on MoSys’ website at http://www.mosys.com.

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