Analog power has always been the standard. New digital power modules offer great flexibility, but that comes with a price. For many applications, we’d love to have the simplicity and efficiency of analog power with the features of digital power. In this episode of Chalk TalkHD Amelia Dalton chats with Steve Stella from Microchip Technology about … Read More → "Introducing Digitally Enhanced Power Analog"
In this episode of Chalk Talk, Amelia chats with Gordon Hands (Lattice Semiconductor) about some awesomely tiny FPGAs that bring the power of programmable logic into devices like cell phones, tablets, and other power and form factor sensitive applications. Click the button below to download a free datasheet that details of the features of Lattice Semiconductor’s iCE40LP/HX … Read More → "World’s Smallest FPGAs Solve 4 Big Problems"
Do you worry about security in your FPGA design? Are there bad guys out there trying to take advantage of security holes in your electronic designs? What can we do to stop them? In this episode of Chalk Talk, Amelia chats with Tim Morin (Microsemi) about the practical aspects of security in mainstream SoC FPGAs – what … Read More → "What is Design Security in a Mainstream SoC?"
In this episode of Chalk TalkHD Amelia chats with Louie de Luna about Aldec’s new Spec-TRACER tool and how Spec-TRACER helps you navigate your way through your design flow – from beginning to end, from requirements to verification. Click here to register for the live webcast: DO-254 Requirements Traceability Click the link below to download the … Read More → "DO-254 Requirements Traceability with Spec-TRACER"
In today’s mobile designs, displays are one of the most important components in differentiating your product. As a result, more people are designing high-resolution displays into mobile devices. But, adding a high-res display to your design can be a complex task. In this episode of Chalk Talk, Amelia chats with Pavel Klinger (GLOBALFOUNDRIES) about GLOBALFOUNDRIES’ solutions for the … Read More → "Advanced Smart Display Solutions"
Power consumption is one of the key drivers in system design today, and it’s about time we had a way to estimate and verify the power used by our design. In this episode of Chalk TalkHD Amelia chats with Lauro Rizzatti (Synopsys) about how to verify and estimate power consumption with the ZeBu emulator.
When it comes to custom IC design, one size most definitely does not fit all. Different applications call for specialized IP, tools, and even semiconductor processes. But, sorting through the options can be a daunting process. In this episode of Chalk Talk, Amelia Dalton chats with Pavel Klinger from GLOBALFOUNDRIES about market-specific solutions that … Read More → "Market-Specific Custom IC Solutions"
In this episode of Chalk TalkHD Amelia chats with Andy Caldwell (Tabula) about putting an end to the oppressive reign of timing closure terror. Tabula’s Spacetime architecture – it turns out – besides giving us crazy performance for our high-bandwidth designs – also makes timing closure drop-dead easy. Click the link below to download the free whitepaper: Timing … Read More → "Timing Closure Made Easier with Stylus"
In parts 1 & 2 of this 3-part Chalk Talk series, we talked about how Triad Semiconductor can save you 75%, or even as much as 99% in your next mixed-signal ASIC design. But, what good is savings if you don’t know what you can design with it? In this third episode of our 3-part Chalk … Read More → "How to Design a Sigma Delta Mixer Circuit"
What do you do when plain-old FPGAs leave too much on the table to handle your next bandwidth challenge efficiently? In this episode of Chalk TalkHD Amelia chats with Christian Plante (Tabula) about Tabula’s new ABAX2 devices – based on their innovative Spacetime architecture. ABAX2 is fabricated on the latest Intel 22nm Tri-Gate technology, and can give you an … Read More → "Solving the 100Gbps Challenge with ABAX2"
Jan 17, 2019
After two interesting blogs by Yagya Mishra that explained the most popular features of the Run Plan assistant in Virtuoso® ADE Assembler , I am writing this third blog in the series to share... [[ Click on the title to access the full blog on the Cadence Community site...
Jan 16, 2019
112 Gbps Samtec Flyover'¢ Demo Samtec's Ralph Page walks us through a live demonstration of a Samtec Flyover'¢ system which enables 112 Gbps PAM4 performance. The Credo CDR generates two ports of 31-bit PRBS data at 112 Gbps PAM4 data rates. The signal travels from...