editor's blog
Subscribe Now

Costs for Sub-20nm Wafers put Another Nail in Moore’s Law’s Coffin

 

IC Insights has just published the September Update to The 2018 McClean Report, and one figure (reproduced below) puts yet another nail into the coffin for poor old Moore’s Law. Now please take care. There’s a vertical line between the 200mm wafers on the left going down to 0.13 micron lithography and 300mm wafers on the right, going down to 20nm. Per-wafer costs more than doubled going from 0.13 microns to 90nm, but the available real estate on a 300mm wafer is more than twice that on a 200mm wafer, so the cost per square nanoacre of silicon has stayed pretty constant.

(Note that the figure is labeled “revenue” but that’s from the foundry’s perspective. To the foundry customer, it’s a cost.)

But look at the jump in per-wafer costs between 28nm and 20nm (and below). There’s a sharp cost jump of slightly more than 2x, with no increase in nanoacerage. Sure, you can get more chips per wafer thanks to shrinking feature sizes, but that’s not usually what happens. The next-generation chip always has to incorporate more features. That tall bar on the far right of the graph should be drawn as a nail because it’s going into the coffin lid for Moore’s Law, which is an economic law.

As a reminder, here are the words that Moore originally used to describe the phenomenon he was seeing back in 1965:

 

“The complexity for minimum component costs has increased at a rate of roughly a factor of two per year.”

 

Moore’s Law is not just about doubling. It’s about doubling component count at a minimum cost per component.

The latest McClean Report also says, “There will probably be only three foundries able to offer high-volume leading-edge production over the next five years.” Which three? TSMC, Samsung, and Intel. The cost of joining this club is so high, it’s a safe bet that no other company is going to apply. In fact, Globalfoundries just cancelled its club membership because the dues were becoming too high. (See “Monty Python, Dead Parrots, Moore’s Law, and the ITRS.”)

 

For more information about The 2018 McClean Report from IC Insights, click here.

 

 

One thought on “Costs for Sub-20nm Wafers put Another Nail in Moore’s Law’s Coffin”

Leave a Reply

featured blogs
Apr 25, 2024
Cadence's seven -year partnership with'¯ Team4Tech '¯has given our employees unique opportunities to harness the power of technology and engage in a three -month philanthropic project to improve the livelihood of communities in need. In Fall 2023, this partnership allowed C...
Apr 24, 2024
Learn about maskless electron beam lithography and see how Multibeam's industry-first e-beam semiconductor lithography system leverages Synopsys software.The post Synopsys and Multibeam Accelerate Innovation with First Production-Ready E-Beam Lithography System appeared fir...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Peak Power Introduction and Solutions
Sponsored by Mouser Electronics and MEAN WELL
In this episode of Chalk Talk, Amelia Dalton and Karim Bheiry from MEAN WELL explore why motors and capacitors need peak current during startup, the parameters to keep in mind when choosing your next power supply for these kind of designs, and the specific applications where MEAN WELL’s enclosed power supplies with peak power would bring the most benefit.
Jan 22, 2024
13,247 views