[Preface: we are presenting a paper on this topic at the upcoming SEE/MAPLD conference, May 21-24, 2018 in La Jolla, CA – Join us!] Today’s FPGA designs include multiple cores, interfaces, test logic, and even different internal power and voltage domains. In ...
Back in 1790, Luigi Galvani was dissecting a frog and noticed that he could cause its leg to move when touching a nerve with two probes. He called this phenomenon “animal electricity.” This concept was soon refined over time to become the voltaic ...
My latest article on embedded.com has been published. This piece is the nineteenth installment of the RTOS Revealed series, which will continue to appear through the rest of 2018. The series will cover every aspect of real time operating systems. Semaphores: introduction ...
Mentor aims to grow emulation with lower gate-count hardware LiDAR Goes Back To The Future Webinar: Fastest Lowest-Cost Route to Developing ARM based Mixed Signal SoCs Using thermofluid simulation to optimize liquid cooling of avionics power systems Power Aware Intent And ...
Mentor on Facebook
Mentor on Twitter
Mentor Chalk Talks
Integrating Schematic Integrity Analysis Into Any Design Flow
Schematic integrity problems cause a lot of expensive PCB re-spins. Errors in schematics can lead to schedule delays, manufacturing reruns, support problems, and higher overall project costs. In this episode of Chalk Talk, Amelia Dalton chats with Craig Armenti from Mentor about how Xpedition Schematic Integrity Analysis can help catch and correct errors in your PCB schematics right when they happen.
Click here for more information Schematic Integrity Analysis
Moving Between FPGA and ASIC with High-Level Synthesis
Click here for more information about Catapult® High-Level Synthesis
Tanner Designer: Analog Verification
Most design teams struggle with verification on the analog portion of their designs. While huge strides have been made in digital design over the past decade, analog design remains more of a mystery for many engineers. In this episode of Chalk Talk, Amelia Dalton chats with Mass Sivilotti from Mentor about Tanner Designer – a solution that addresses the challenges of verifying today’s analog designs.
Click here for more information about Tanner AMS and MEMS Flows.