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Less Pessimism, Please

POCV is the Latest Salvo in Improving Timing Analysis Accuracy

by Bryon Moyer

When I was a teen, I remember someone coming to help my Dad plan a big move of some piece of equipment on our orchard. What struck me was how this guy could pre-visualize all the various scenarios and then consider the consequences and, in particular, all the things that could possibly go wrong for the different cases.

I was pretty impressed. It seemed like such thorough analytical capabilities were a skill and a gift. Over time, however, I’ve noticed that such an ability isn’t always appreciated. Because most of the world likes to assume best-case conditions, the “value add” of the more thorough approach is to point out that there are potential negative consequences too. Which makes you Mr. Negative. The pessimist. Always there to dash cold water on a hot idea. Doesn’t matter if you’re right.  Read More


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Is Exactly-Once Delivery Possible with MQTT?

Posted on 05/28/15 at 4:01 PM by bmoyer

bmoyer
This is one of those topics that swirls in my head before, during, and after the time I'm writing. And, in that "after" time, I've changed my mind on something I said above. The thing about the sender setting a final state instead of an increment? I said …

Xilinx Loses Its Tail

Posted on 05/28/15 at 8:40 AM by Dick Selwood

Dick Selwood
The barrier for entry into the FPGA market has always been tools. If you talk to Altera/Xilin, you discover that they make a massive investment every year in tools. Anyone wanting to "just add some FPGA" to a SoC offering is going to have to develop a too…

Bend it like Silicon

Posted on 05/28/15 at 7:56 AM by Dick Selwood

Dick Selwood
What could you build with a flexible circuit?

Xilinx Loses Its Tail

Posted on 05/27/15 at 6:04 PM by kevin

kevin
@TotallyLost,
I agree on most points. The (major) exception is that (from previous discussions) you and I have a dramatically different view on the complexity of industrial-strength software-to-gates technology. I don't think any of the companies you lis…

Xilinx Loses Its Tail

Posted on 05/27/15 at 6:04 PM by kevin

kevin
@TotallyLost,
I agree on most points. The (major) exception is that (from previous discussions) you and I have a dramatically different view on the complexity of industrial-strength software-to-gates technology. I don't think any of the companies you lis…

Ignore Those Pesky Bugs

Posted on 05/27/15 at 3:16 PM by TotallyLost

TotallyLost
I think it boils down to the necessary checks to bring up a new system without data corruption and memory faulting, vs what's necessary for safe operation after deployment.

A sane programmer is still using lot's of asserts at bring up ... to catch the …

Xilinx Loses Its Tail

Posted on 05/27/15 at 2:54 PM by TotallyLost

TotallyLost
Good idea, except for the natural market problem the competition is Intel, AMD, Motorola, Freescale, Atmel, Microchip, and some two dozen other processor/SoC companies already in that market.

As soon as some major subset of those companies realize that…

Portable Heterogeneous Multicore

Posted on 05/27/15 at 2:35 PM by TotallyLost

TotallyLost
In theory, once GPU's are integral to the CPU and share the cache bus interface, then OpenMP would allow the C/C++ compiler to use both resources transparently.

The bigger problem is also teaching the OS to context switch those resources as well .... s…

Xilinx Loses Its Tail

Posted on 05/27/15 at 11:21 AM by WEATHERBEE

Right Idea.

Portable Heterogeneous Multicore

Posted on 05/26/15 at 11:28 AM by bmoyer

bmoyer
Thanks for the heads-up. Do you see these two approaches as potentially competing or as focused on different problems?

Welcome to the beta version of EE Journal's new product section.  When you start designing something awesome and need information on specific components, we want EEJournal to be your go-to resource. If you have an idea that would make this section more useful in your next design project, Let us know, and we'll get working on it.


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