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Is Exactly-Once Delivery Possible with MQTT?

This is one of those topics that swirls in my head before, during, and after the time I'm writing. And, in that "after" time, I've changed my mind on something I said above. The thing about the sender setting a final state instead of an increment? I said …

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Xilinx Loses Its Tail

The barrier for entry into the FPGA market has always been tools. If you talk to Altera/Xilin, you discover that they make a massive investment every year in tools. Anyone wanting to "just add some FPGA" to a SoC offering is going to have to develop a too…

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Bend it like Silicon

What could you build with a flexible circuit?

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Ignore Those Pesky Bugs

I think it boils down to the necessary checks to bring up a new system without data corruption and memory faulting, vs what's necessary for safe operation after deployment.

A sane programmer is still using lot's of asserts at bring up ... to catch the …

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Portable Heterogeneous Multicore

In theory, once GPU's are integral to the CPU and share the cache bus interface, then OpenMP would allow the C/C++ compiler to use both resources transparently.

The bigger problem is also teaching the OS to context switch those resources as well .... s…

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Buses, Windows, and You

Amazon Prime started as just free shipping. Now they have seriously upped the subscription and thrown in Amazon instant video streaming. Cool if you watch lots of video but not if you only want books. Strangely it allows you to opt out of free delivery bu…

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A Dendrite-Free Lithium Anode

What do you think of the higher-concentration LiFSI-DME battery electrolyte?

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Eschew the Real World

I understand simulating a CPU for a complex SoC in an attempt to get early code development on low level memory and device interfaces ... in particular to have bring up diagnostics done by the time silicon and boards finally arrive.

As obruend notes, t…

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