Highlevel Language Design Methodologies sounds great to me.
One question: Why only C and C++ as the highlevel languages?
Wouldn't there be interest in using languages like Java, Python, Scala, Clojure etc. for direct FPGA synthesis. If a couple highlev…
Most of the current EDA tools and methodology are well past their prime. The high variability in sub 45nm Silicon means you want to move to asynchronous design techniques, and the move to die-stacking means you need aggressive power management - being abl…
Generating Random Numbers has been my Diploma Thesis, published in 1961. See
(sorry, in German language)
A sensor (scintillation counter) received input from radioative radi…
I truly enjoyed reading and feeling the article.
That's good to hear. Most of my exposure has been via safety-critical, which, by definition, is less fluid.