industry news
Subscribe Now

sureCore Opens Low-Power SRAM IP Customization Service

Process independent and silicon proven

SHEFFIELD, England, Sept. 25, 2018 /PRNewswire/ — sureCore Ltd., announces a low-power SRAM IP application-centric customization service that delivers specific power and performance requirements for wearable, wireless, augmented reality and IoT devices whose requirements go beyond standard low-power memory IP.

sureCore’s application-centric, patented and silicon-proven, low-power design techniques prioritize power optimization over speed and area.  The new service covers a wide spectrum of memory requirements covering multiple read/write ports, ultra-low leakage retention modes, low dynamic power, near-threshold operation, write masking and BIST/DFT support.

The sureCore service develops memory variants including SRAM and Register Files based on either standard foundry or custom bit cells, the latter capable of delivering ultra-low operating voltages, improved leakage characteristics and improved performance.

The application-centric service is rooted in sureCore’s innovative design approach and  memory architectures that include:

  • Segmented arrays and bit line voltage control that delivers optimal dynamic power and performance.
  • SMART-Assist circuitry for near-threshold operation across process and temperature extremes.
  • Highly granular sleep modes, coupled with independent sub-banks.
  • Custom single and multi-port bit cells.
  • Pipelined read circuitry that meets demanding performance goals.

“Today’s emerging markets aren’t playing by yesterday’s rules and SoC architects developing cutting edge low-power devices can no longer make do with standard memory IP, ” explains Eric Gunn, sureCore’s Chief Operating Officer.

“A number of companies have come to us with very ultra-low, application-specific power and performance targets that demand “out-of-the-box” thinking to achieve record-setting energy efficiency,” explains sureCore’s CEO, Paul Wells.

The new customization service produces results based on a rigorous verification regime that incorporates statistical, parametric and physical validation to ensure that sureCore’s  application-centric memories meet demanding quality requirements. Design flows based on industry-leading memory characterization tooling delivers multiple PVT corners quickly, accurately and  automatically.  All industry-standard EDA views are supported.

For additional information, go to www.sure-core.com.

About sureCore
sureCore Limited is an SRAM IP company based in Sheffield, UK, developing low power memories for current and next generation, silicon process technologies. Its award-winning, world-leading, low power SRAM design is process independent and variability tolerant, making it suitable for a wide range of technology nodes.  This IP helps SoC developers meet challenging power budgets and manufacturability constraints posed by leading edge process nodes.

Leave a Reply

featured blogs
Apr 23, 2024
Do you think you are spending too much time fine-tuning your SKILL code? As a SKILL coder, you must be aware that producing bug-free and efficient code requires a lot of effort and analysis. But don't worry, there's good news! The Cadence Virtuoso Studio platform ha...
Apr 23, 2024
We explore Aerospace and Government (A&G) chip design and explain how Silicon Lifecycle Management (SLM) ensures semiconductor reliability for A&G applications.The post SLM Solutions for Mission-Critical Aerospace and Government Chip Designs appeared first on Chip ...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Peak Power Introduction and Solutions
Sponsored by Mouser Electronics and MEAN WELL
In this episode of Chalk Talk, Amelia Dalton and Karim Bheiry from MEAN WELL explore why motors and capacitors need peak current during startup, the parameters to keep in mind when choosing your next power supply for these kind of designs, and the specific applications where MEAN WELL’s enclosed power supplies with peak power would bring the most benefit.
Jan 22, 2024
13,112 views