UMC and Cadence Collaborate to Deliver 28nm Design Reference Flow for ARM Cortex-A7 MPCore-based SoC
SAN JOSE, Calif., 20 Jan 2015
Highlights:
- Flow included Cadence Encounter Digital Implementation System, Tempus Timing Signoff Solution, Voltus IC Power Integrity Solution, Quantus QRC Extraction Solution, Physical Verification System, Litho Physical Analyzer and CMP Predictor
- UMC achieves ARM Cortex-A7 performance and power metrics of 1.7GHz and less than 200mW of dynamic power
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