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Synopsys Galaxy Implementation Platform enables first-pass silicon success on Infineon’s 40-nanometer X-GOLD 626 wireless product

MOUNTAIN VIEW, Calif., March 30, 2010 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Galaxy™ Implementation Platform has helped Infineon Technologies AG (NYSE: IFX) achieve first-pass silicon success of the 40-nanometer (nm) baseband processor for its X-GOLD™ 626 3G wireless analogue and digital system-in-package (SIP). Infineon utilised the Galaxy platform’s powerful implementation flow to optimise the chip’s multiple functional modes with multi-corner/multi-mode (MCMM) technology, taking advantage of the links between Synopsys’ Design Compiler® RTL synthesis solution and IC Compiler placement … Read More → "Synopsys Galaxy Implementation Platform enables first-pass silicon success on Infineon’s 40-nanometer X-GOLD 626 wireless product"

EnSilica launches major new version of its eSi-RISC Development Suite

Wokingham and Cambridge, UK – March 29, 2010.  EnSilica, a leading independent provider of front-end IC design services, has launched a major new version of its eSi-RISC Development Suite.  The eSi-RISC Development Suite v2.1 provides a comprehensive platform for easily evaluating EnSilica’s family of eSi-RISC highly configurable and low-power soft processor cores, along with a complete development environment for the creation, implementation and test of eSi-RISC processor embedded application designs.

Read More → "EnSilica launches major new version of its eSi-RISC Development Suite"

Design Compiler 2010 doubles productivity of synthesis and place and route

MOUNTAIN VIEW, Calif., 29th March – Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced Design Compiler® 2010, the latest RTL synthesis innovation within the Galaxy™ Implementation platform, which delivers a twofold speedup in the synthesis and physical implementation flow. To meet aggressive schedules for increasingly complex designs, engineers need an RTL synthesis solution that enables them to minimise iterations to speed up physical implementation. To address these challenges, topographical technology in Design Compiler 2010 is being extended to produce “physical guidance” to Synopsys’ flagship … Read More → "Design Compiler 2010 doubles productivity of synthesis and place and route"

MOST150 Now Allows Safety Critical Applications

Karlsruhe (Germany) March 23, 2010 – The MOST Cooperation welcomes the latest research results proving that MOST150 is ready to support safety-critical applications and may be available as the future network for driver assistance systems. By supporting the new domain of driver assist, the latest MOST Technology completes the major fields of in-car uses such as entertainment, information, mobile connectivity, and connected services. “Today’s MOST is now exceeding the limits of infotainment,” stated Harald Schoepp, member of the MOST Cooperation steering committee. “Driver assistance functions are starting to complete and extend the feature set of traditional infotainment systems. Along with information … Read More → "MOST150 Now Allows Safety Critical Applications"

Tanner EDA and Dongbu HiTek Semiconductor Jointly Develop Foundry-certified Process Design Kits (PDKs) for Critical Process Nodes

MONROVIA, California and SEOUL, Korea – March 24, 2010 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and Dongbu HiTek, a world-class wafer fabricator, are jointly developing foundry-certified process development kits (PDKs) that will be integrated seamlessly into Tanner’s cohesive, integrated tool flow. Designers using Tanner software solutions will have certified libraries to draw on as they create ICs at critical process nodes for production at Dongbu foundries, reducing design risk and providing faster time to market and … Read More → "Tanner EDA and Dongbu HiTek Semiconductor Jointly Develop Foundry-certified Process Design Kits (PDKs) for Critical Process Nodes"

ASTER announces the first DfT software to combine Electrical and Mechanical analysis

Cesson-Sévigné,  France, March 2010 — During APEX 2010 at the New Mandalay Bay Resort & Convention Center in Las Vegas, ASTER Technologies, the leading supplier in Board-Level Testability and Test Coverage analysis tools, will introduce the first Design for Test (DfT) software to combine electrical and mechanical analysis.

It has been developed to address a new vision of the DfT market that has to solve the many challenges that developers face today, such as: shrinking release cycles, budget compression and improvement in product quality.

TestWay, the world-wide reference … Read More → "ASTER announces the first DfT software to combine Electrical and Mechanical analysis"

Geotest and Pickering Interfaces Announce Strategic Alliance

IRVINE, CA AND CLACTON-ON-SEA, ESSEX, ENGLAND, March 2010 — In an effort to enhance customer’s choices and options when designing PXI systems,  Geotest- Marvin Test Systems, a global producer of PXI and PC-Based test equipment and test solutions, and Pickering Interfaces, a global market innovator in signal switching and conditioning,  announced today that they are embarking on a Strategic Alliance program.

An initial element of this program has been the creation of a joint web site, www.PXI4test.com, designed to educate … Read More → "Geotest and Pickering Interfaces Announce Strategic Alliance"

EXFO Extends Its Market-Leading OTN Test Capabilities to 100G Ethernet Testing

QUEBEC CITY, March 17 /PRNewswire-FirstCall/ — EXFO Inc. (NASDAQ:EXFO) (NASDAQ: TSX:) (NASDAQ:EXF) announced today the addition of optical transport network (OTN) testing capabilities on its FTB/IQS-85100G Packet Blazer 100G/40G Ethernet Test Modules. These include OTU4 (111.81 Gbit/s) and OTU3 (43.018 Gbit/s) full-line-rate testing, as … Read More → "EXFO Extends Its Market-Leading OTN Test Capabilities to 100G Ethernet Testing"

New UK Distributor for Impulse C to FPGA Compiler

8th March, 2010, Northwich, Cheshire – Kane Computing Ltd (KCL) today announced the signing of an agreement with Impulse Accelerated Technologies (Impulse) to resell their software-to-hardware FPGA compilation and verification tools in the UK and Ireland.

The Impulse C-to-FPGA tools allow application developers to quickly create custom accelerator and filter modules in C, increasing productivity for developers of advanced video and image processing, DSP, and hardware-accelerated computing applications. Users of Impulse C report saving as much as half their design time using C when compared to using HDL methods.

Products and services KCL will be supporting include … Read More → "New UK Distributor for Impulse C to FPGA Compiler"

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