Cadence Announces Stratus High-Level Synthesis Platform
SAN JOSE, Calif., 24 Feb 2015
HIGHLIGHTS:
- Industry’s first high-level synthesis platform that can be utilized across an entire system-on-chip (SoC) design
- First silicon-proven high-level synthesis platform to address real world challenges, including ECO, low power, IP reuse, and routing congestion
- Consistent environment from TLM through gates improves design and verification quality
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Cadence® Stratus™ high-level synthesis platform, the industry’s first high-level synthesis platform that can be utilized across an entire system-on-chip (SoC) design. This next-generation platform … Read More → "Cadence Announces Stratus High-Level Synthesis Platform"