austriamicrosystems expands CMOS, High-Voltage, High-Voltage Flash and RF Multi Project Wafer Services for Foundry Customers
Unterpremstaetten, Austria (November 22, 2010) – austriamicrosystems’ Full Service Foundry business unit today released its expanded fast and cost-efficient ASIC prototyping service, known as Multi-Project Wafer (MPW) or shuttle run, with an even more extensive schedule in 2011. The service, which combines several designs from different customers onto one wafer, offers significant cost advantages for foundry customers as the costs for wafer and masks are shared among a number of different shuttle participants.
austriamicrosystems’ best-in-class MPW service includes the whole range of 0.18 µm … Read More → "austriamicrosystems expands CMOS, High-Voltage, High-Voltage Flash and RF Multi Project Wafer Services for Foundry Customers"
- Additional photometry type support for far-field and surface receivers
- Standard photometric report generation
- Illuminance data display in the 3D model for fast visualization of results
- CIE color difference analysis for calculating and optimizing system color performance
- New user interface that maximizes working area and flexibility
MOUNTAIN VIEW, Calif., Nov. 18, 2010 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of enhancements to its LightTools® illumination design and analysis software. … Read More → "Synopsys’ New LightTools Enhances Lighting Design Capabilities for the Development of Luminaires"
Mentor Graphics Adds NetLogic Microsystems’ Multi-Core Processor Support to Mentor Embedded Linux Product Portfolio
WILSONVILLE, Ore., November 17, 2010—Mentor Graphics Corporation (NASDAQ: MENT) today announced new extensions to the Mentor® Embedded Linux® portfolio for NetLogic Microsystems’ (NASDAQ: NETL) multi-core, multi-threaded processors. The family of XLPTM, XLR® and XLS® multi-core, multi-threaded processors from NetLogic Microsystems with scalability to 128 NXCPUs™ are targeted at next-generation 3G/4G mobile wireless infrastructure, enterprise, storage, security, metro Ethernet, edge and core infrastructure network applications.
The Mentor Embedded Linux platform provides a comprehensive Linux environment, development tools, and support for a unified workflow methodology, enabling customers to quickly create innovative, customized products … Read More → "Mentor Graphics Adds NetLogic Microsystems’ Multi-Core Processor Support to Mentor Embedded Linux Product Portfolio"
Synopsys’ IC Validator Completes Qualification for TSMC’s 40-nm and 65-nm iDRC/iLVS Physical Verification
MOUNTAIN VIEW, Calif., Nov. 17, 2010 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its IC Validator physical verification product is qualified for TSMC’s 40-nm and 65-nm interoperable DRC/LVS runsets, and is immediately available to TSMC customers. IC Validator, part of the Galaxy™ Implementation Platform, is an ideal add-on to IC Compiler for In-Design physical verification. By enabling physical verification within the implementation flow, IC Validator enables place and route engineers to accelerate time to tapeout and improve manufacturability. TSMC’s qualification of IC Validator … Read More → "Synopsys’ IC Validator Completes Qualification for TSMC’s 40-nm and 65-nm iDRC/iLVS Physical Verification"
MOUNTAIN VIEW, Calif., Nov. 17, 2010 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today recognized the Best Paper Awards from the most recent Synopsys Users’ Group (SNUG) conferences in Boston, Ottawa and Austin. The three conferences are part of a global network of SNUG events that drew nearly 8,000 Synopsys customers in 2010.
Synopsys recently expanded the SNUG program to include events in Ottawa and Austin, making the conferences more accessible and relevant to a greater number of its customers. “Bringing SNUG to the backyards of additional customers underscores … Read More → "Synopsys Expands EDA’s Largest Users Group to Include Conferences in Ottawa and Austin"
Agilent Technologies’ Software Fundamentally Improves, Automates STMicroelectronics’ Device Modeling On-Wafer Measurements
SANTA CLARA, Calif., Nov. 15, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that its IC-CAP Wafer Professional (WaferPro) software has been successfully deployed at STMicroelectronics. WaferPro adds new capabilities toAgilent’s Integrated Circuit and Analysis Program (IC-CAP) software platform to enable efficient, automated on-wafer measurements for device modeling applications.
STMicroelectronics uses IC-CAP as a device modeling platform to extract semiconductor device models for silicon devices (CMOS and BJT, for example). … Read More → "Agilent Technologies’ Software Fundamentally Improves, Automates STMicroelectronics’ Device Modeling On-Wafer Measurements"
Rogue Wave Software Releases Version 7.0 of the IMSL® Fortran Numerical Library With Additional Algorithms and Support for NVIDIA CUDA
NEW ORLEANS, LA–(Marketwire – November 15, 2010) – Today at SuperComputing 2010, Rogue Wave Software, Inc., a Battery Ventures portfolio company, announced the general availability of IMSL Fortran Numerical Library version 7.0. This release of the company’s powerful math and statistics algorithms will allow users with supported hardware to simply link the IMSL Fortran Library with NVIDIA’s CUDA BLAS to gain the significant performance improvement available by offloading processing to the GPU.
“We are pleased to see the IMSL Fortran … Read More → "Rogue Wave Software Releases Version 7.0 of the IMSL® Fortran Numerical Library With Additional Algorithms and Support for NVIDIA CUDA"
Cadence Design Systems, Inc. (NASDAQ: CDNS), a global leader in electronic design innovation, today introduced a new holistic approach to Silicon Realization that moves chip development beyond a patchwork of point tools to a streamlined end-to-end path of integrated technology, tools, and methodology. This approach represents a stark turn from the discreet and compartmentalized ways semiconductor and systems companies have traditionally achieved Silicon Realization, the term that refers to all the steps required for bringing a design to silicon and a key component of … Read More → "Cadence Unveils Holistic Approach to Silicon Realization"
Open-Silicon Achieves Ultra High Performance Using Cadence Silicon Realization Technology to Tape-Out Breakthrough 2.4 GHz ASIC Processor
BANGALORE, INDIA–(Marketwire – November 15, 2010) – Cadence Design Systems (India) Pvt Ltd., a subsidiary of Cadence Design Systems, Inc. (NASDAQ: CDNS), announced that Open-Silicon, Inc., a leading semiconductor company focused on ASIC design, develop-to-spec, and derivative ICs, has successfully taped out a breakthrough high-performance processor at over 2.4GHz under typical conditions utilizing the Cadence® Silicon Realization product line. Open-Silicon completed the entire design using Cadence’s integrated end-to-end Encounter® digital design, implementation, and manufacturability signoff technology.
“Cadence offers a complete suite of tools for … Read More → "Open-Silicon Achieves Ultra High Performance Using Cadence Silicon Realization Technology to Tape-Out Breakthrough 2.4 GHz ASIC Processor"
MOUNTAIN VIEW, Calif. and SHANGHAI, Nov. 15, 2010 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 981), today announced that they have delivered a comprehensive solution for system-on-chip (SoC) design for SMIC’s advanced 65-nanometer (nm) process. The solution integrates Synopsys’ broad DesignWare™ interface and analog IP portfolio plus other foundation IP with Synopsys’ Galaxy™ Implementation Platform, in a tuned reference flow. The companies have also begun work on their 40-nm design solution. Based on collaboration agreements for 65-nm and 40-nm, … Read More → "Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes"