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Magma Launches Titan ALX and Titan AVP – Dramatic Layout Productivity Improvement for Analog/Mixed-Signal Designs

SAN JOSE, Calif., May 17, 2010 – Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, today announced Titan™ Analog Layout Accelerator (ALX) and Titan Analog Virtual Prototyper (AVP), new tools that accelerate the creation and optimization of new analog design layouts, and automate the reuse of existing analog layouts in new processes and technologies. 

Augmenting the comprehensive Read More → "Magma Launches Titan ALX and Titan AVP – Dramatic Layout Productivity Improvement for Analog/Mixed-Signal Designs"

Synopsys’ IC Compiler widely deployed at MediaTek

MOUNTAIN VIEW, Calif.—May 13, 2010 —Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital multimedia solutions, has standardised on Synopsys’ IC Compiler physical design solution, a key component of the Galaxy™ Implementation Platform, to deliver best performance, power and area on MediaTek’s leading-edge wireless communications chips. IC Compiler’s advanced placement, timing and power optimisation along with its tight correlation to signoff has contributed to faster design closure.

< … Read More → "Synopsys’ IC Compiler widely deployed at MediaTek"

eASIC Nextreme Used for Hardware Validation of Microsoft RemoteFX Technology

SANTA CLARA, CA, – May 13, 2010 – eASIC Corporation today announced that it is working with Microsoft Corp. on using eASIC’s Nextreme NEW ASICs to create a hardware implementation of the Microsoft RemoteFX™ technology, which was announced two months ago. eASIC’s Nextreme product has been able to quickly validate the Microsoft RemoteFX technology in silicon and to attract a growing ecosystem of companies interested in developing … Read More → "eASIC Nextreme Used for Hardware Validation of Microsoft RemoteFX Technology"

Agilent Technologies to Showcase Latest RF/Microwave Design and Test Products at 2010 International Microwave Symposium

SANTA CLARA, Calif., May 11, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that it will demonstrate the latest design and test innovations for advanced RF and microwave research, development and manufacturing at the 2010 IEEE MTT-S International Microwave Symposium (IMS), May 25 – 27, at the Anaheim Convention & Exhibition Center, Booth 924.

“Agilent’s design and test solutions provide engineers with the tools they need to accelerate their research, design and development in RF, microwave and millimeter-wave electronics,” said Barry Alcorn, U.S. marketing program manager in Agilent’s Electronic Measurement Group. “At IMS 2010, we’re showing the latest products and application … Read More → "Agilent Technologies to Showcase Latest RF/Microwave Design and Test Products at 2010 International Microwave Symposium"

Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC’s 65 Nanometer LL Process Technology

MOUNTAIN VIEW, Calif. and SHANGHAI, May 13 /PRNewswire-Asia/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design and manufacturing and Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI and SEHK: 0981.HK), one of the leading semiconductor foundries in the world, today announced the immediate availability of Synopsys’ silicon-proven and USB logo-certified DesignWare(R) USB 2.0 nanoPHY intellectual property (IP) for SMIC’s 65 nanometer (nm) low- leakage (LL) process technology. As a leading provider of complete IP solutions for the USB 2.0 … Read More → "Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC’s 65 Nanometer LL Process Technology"

Software Developers Get New High Performance Computing C-to-FPGA Tools

Kirkland, WA – May 11, 2010 – DRC Computer and Impulse Accelerated Technologies today announced that the Impulse C™-to-FPGA tools have been integrated with the DRC Accelium™ coprocessor card, enabling software engineers to fully access hardware acceleration using familiar C programming methods. This integration provides C-language control of I/O, memory, streams and signals at the hardware level, allowing applications to leverage the high parallelism possible in FPGAs for higher performance.

FPGAs are recognized as powerful accelerators for non-sequential algorithms, and have been successfully deployed by engineering teams … Read More → "Software Developers Get New High Performance Computing C-to-FPGA Tools"

NextOp Announces BugScope™ Assertion Synthesis for Progressive, Targeted Verification

SANTA CLARA, Calif., May 6 /PRNewswire/ — NextOp Software, Inc. today announced BugScope, the industry’s first assertion synthesis product to synthesize high quality assertions and functional coverage properties from the Register Transfer Level (RTL) design and testbench. These properties enhance existing verification flows by helping design and verification engineers uncover corner-case bugs, expose functional coverage holes and increase verification observability. 

BugScope automatically generates assertions and functional coverage in IEEE standard formats such as SVA, PSL or synthesizable Verilog. … Read More → "NextOp Announces BugScope™ Assertion Synthesis for Progressive, Targeted Verification"

eASIC eTools 8.1 Design Suite Reduces Design Time by 40%

SANTA CLARA, CA, –  May 5, 2010 – eASIC Corporation, a provider of NEW ASIC devices, today announced the immediate availability of its eTools 8.1 Design Suite for implementing 45nm Nextreme-2 designs. The eTools 8.1 tool suite delivers a robust ASIC grade design flow with the simplicity and ease of design that is normally associated with FPGA design tools. New features and enhancements in eTools 8.1 enable designers to reduce overall design time by up to 40% while increasing design performance by up to 30% compared to the previous eTools 8.0 suite.Read More → "eASIC eTools 8.1 Design Suite Reduces Design Time by 40%"

Synopsys Unveils Ethernet Controller IP With New Audio Video Bridging Feature

MOUNTAIN VIEW, Calif., May 5 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® Ethernet Quality-of-Service (QoS) Controller IP which implements the new IEEE specifications for audio video bridging (AVB) features. The DesignWare Ethernet IP solution supports the new IEEE 802.1AS and 802.1-Qav version D6.0 specifications. These specifications enable efficient networking of streaming audio video (AV) applications through IEEE 802.1 networks found in consumer electronics, automotive … Read More → "Synopsys Unveils Ethernet Controller IP With New Audio Video Bridging Feature"

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