eSilicon at DAC: eSilicon Announces New Networking Platform

Presentations Tuesday, June 26 at Chip Estimate Booth 2:00-2:15 PM; Samsung Theatre 3:00-3:15 PM; Mentor Booth 4:00 – 5:00 PM

Join us at Stars of IP Party for appetizers, hosted bar, prizes and fun

For release on June 19, 2017, San Jose, Calif.

eSilicon, an independent provider of FinFET-class ASICs, custom IP, and advanced 2.5D packaging solutions, will participate at several venues at the 2018 Design Automation Conference (DAC) in San Francisco, California at Moscone Center West, June 24-28, 2018.

ChipEstimate.com IP Talks!
New Networking Platform
Learn about eSilicon’s new networking platform.
Presenter: Hugh Durdan, eSilicon’s VP, strategy and products
Tuesday, June 26, 2:00-2:15 PM
ChipEstimate.com Booth 2134

Samsung SAFE Partner Theater
eSilicon’s 14LPP IP Platform
Examples of production-qualified HBM/2.5D FinFET networking ASICs, including memory strategies to improve cost, density, power and yield.
Presenter: Mike Gianfagna, eSilicon’s VP, marketing
Tuesday, June 26, 3:00-3:15 PM
Samsung Booth 2635

Mentor Panel Discussion:
Getting Your Tapeout Done on Time isn’t Easy, but It can be Easier
More than 50% of tapeouts don’t occur on schedule. Which 50% do you want to be in? Come listen to Calibre customers talk about the challenges that they face and the steps that they take to get their tapeouts on time.
Panelists: Prasad Subramaniam, eSilicon’s VP, R&D and Design Technology; Bob Stear, Samsung; and Satish Dinavahi, Qualcomm India
Tuesday June 26, 4:00-5:00 PM
Mentor Booth 2161

Stars of IP Party at DAC 2018
Tuesday, June 26, 7:00-11:00 PM
Stars of IP is a private, invitation-only event. eSilicon is proud to be a co-host for this event. Silvaco encourages interested parties to seek eSilicon or other co-hosts on the DAC exhibit floor to connect and inquire about a ticket.

About eSilicon
eSilicon is an independent provider of complex FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete 2.5D/HBM2 and TCAM platforms for FinFET technology at 7/14/16nm as well as SerDes, specialized memory compilers and I/O libraries. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Designing Robust 5G Power Amplifiers for the Real World

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featured chalk talk

Designing for Functional Safety with Infineon Memory

Sponsored by Mouser Electronics and Infineon

In this episode of Chalk Talk, Amelia Dalton and Alex Bahm from Infineon investigate the benefits of Infineon’s SEMPER NOR Flash and how the reliability, long-term data retention, and functional safety compliance make this memory solution a great choice for a variety of mission critical applications. They also examine how SEMPER NOR Flash has been architected and designed for functional safety and how Infineon’s Solutions Hub can help you get started using SEMPER NOR Flash in your next design.

Click here for more information about Infineon Technologies SEMPER™ NOR Flash Memory

Apr 22, 2024

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eSilicon at DAC: eSilicon Announces New Networking Platform

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