Cesson-Sévigné, France, March 2010 — During APEX 2010 at the New Mandalay Bay Resort & Convention Center in Las Vegas, ASTER Technologies, the leading supplier in Board-Level Testability and Test Coverage analysis tools, will introduce the first Design for Test (DfT) software to combine electrical and mechanical analysis.
It has been developed to address a new vision of the DfT market that has to solve the many challenges that developers face today, such as: shrinking release cycles, budget compression and improvement in product quality.
TestWay, the world-wide reference coverage analysis tool that allows users to quantify and qualify the test coverage for a wide range of inspection and test equipments, has been enhanced to address the problem for companies that subcontract the manufacture and test of their products, but need to know how to optimize the physical test access in order to achieve maximum test coverage.
The “probe analyzer” is an interactive, rules-based routine specifically designed to assist the Layout engineer or Test developer to identify any possible probe location based on the copper surface, which is useable for a physical access. Access constraints, spacing checks, test points assignment, use of the largest probe size, pin offset and Agilent’s bead probes are taken into account in accordance with company specific guidelines.
Once the potential probe placement has been identified, TestWay can estimate the test coverage for ICT and FPT based on the measurement capabilities of the targeted test equipment. The “probe analyzer” also generates a comprehensive accessibility report that clearly states whether adequate probe locations were identified for each net, highlighting mechanical rules violation, so that this information can be fed back to design to support improvements. By reading the access report interactively with the layout viewer, colour coding is used to assist the design and test engineer to graphically browse the non-testable nets in the design.
TestWay provides a sophisticated level of coverage analysis by allowing users to define the test line and combine ICT or FPT with complementary test techniques such as AOI, AXI, BST, FPT, ICT, MDA and Functional Test. It estimates the theoretical coverage aligned to various test strategies, prior to test development, in order to identify areas where test coverage can be improved, so that electrical rules could be applied to identify DFT violations that limit the test efficiency.
The ability to estimate coverage that is aligned to the mechanical layout constraints of the PCB, allows users complete visibility of what can realistically be achieved, so that the effectiveness of the completed test programs can be realized.
Christophe Lotz, Managing Director of ASTER Technologies, said, “Within the new electronic world where the people who design is no longer the same as the people who produce, the market expects a new generation of tool that is useable by both groups. Now, design & test engineers can identify in a matter of minutes, a missing test point, and understand the consequences in terms of test coverage”.
ASTER proposes a wide range of products that support electrical DfT and test coverage analysis. This allows users to select a configuration, which meets their immediate requirements. TestWay is a scalable product from TestWay Express for coverage estimation and measurement, up to TestWay-Classic that provides additional features such as a fully programmable environment capable of supporting customer’s rules checking, test optimization criteria, advanced reporting and Boundary-Scan test generation.
About ASTER Technologies
ASTER is the leading supplier in Board-Level Testability analysis tools, capitalizing on proven expertise in board testability and strong customer relations. Founded in 1993, ASTER develops a wide range of products dealing with PCB Testability, Viewing and Quality Management. TestWay is a proven solution, used by many PCB design and manufacturing companies worldwide that provides a unique approach to identify electrical testability requirements, compute theoretical test coverage early in the design chain, and check the real test efficiency of running test programs.
For more information about the company and its solutions, please visit www.aster-technologies.com or call ASTER on +33 299 83 01 01
