Jan 21, 2015

Buckle your seat belts: the semi market could be about to explode.

posted by Dick Selwood

At the Future Horizons Semiconductor Industry Forecast on January 20th Malcolm Penn was in one of his classic ebullient modes. His message was "It is time to prepare for one of the strongest (and longest) upswings in chip industry history."

Firstly, the context: this time last year Penn predicted semi sales would grow by  8%, with the most pessimistic case being only 4% and the most optimistic 14%. In fact, with December still to be finalised, it looks like 9.9% for the year.

For 2015 his target is 8.5% growth, with sales of $364.183 billion ($1 billion day). However if we do see a recovery things will be very different. Penn's analysis of the last three upturns showed that the first four quarters of an upturn typically experience growth of around 30%.

However there is not only no spare manufacturing capacity at advanced nodes, TSMC sold out last year, but there is little capacity being built. And even if you start building today, it will be a least a year before you have chips. There is also virtually no inventory being held, all the way from wafers to finished goods. This means that growth will come from price increases as customers compete for the limited supply of chips. The owners of the advanced fabs, mainly TSMC, will be doing well financially.

So while I have been bewailing the lack of excitement in 2014, in one area, if Penn is right, 2015 could become very exciting.

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Jan 20, 2015

Towards Smaller Solar Inverters

posted by Bryon Moyer

Inverters are getting smaller.

We’re talking here about the inverters used in solar cells to convert the DC that they generate into AC for the grid. But there seem to be a couple of different motivations for this reduction in inverter size; I was made aware of them by a two different product releases.

First came an SoC from Semitech. Semitech has primarily been focused on power-line communications (PLC) on the so-called Smart Grid. Their focus hasn’t so much been on residential settings, where broadband connections dominate, but rather longer-distance machine-to-machine narrowband connections. We’re talking hundreds of (electric) meters communicating over a few kilometers.

That said, they noticed an opportunity. Traditionally, a single inverter will serve multiple panels; this helps keep cost down (always an issue as solar struggles to compete with other forms of energy). But Semitech notes that there are some weaknesses with this arrangement. In particular, the one inverter becomes a single point of failure that can take all of its panels out of action. Efficiency also gets tuned to the needs of the worst (e.g., most shaded) panel – meaning that energy is wasted from the other panels.

The ideal would be a micro-inverter for each panel – something that’s generally been a cost challenge. So Semitech is trying to reduce that added cost by integrating the inverter electronics (not the transformers) into the PLC chip. So any inverter that was intended to communicate could get the inverter control circuitry almost for free (it’s a small add-on to the PLC circuitry, which dominates the chip).

Semitech_image_ret_copy.png

(Click to enlarge)

Image courtesy Semitech.

By the way, apparently the same chip can be used for LED control if loaded with different software.

Meanwhile, ST Microelectronics announced a rather simpler product: an SiC diode. It replaces larger devices that have been needed in order to provide sufficient overcurrent margin. The new SiC diode can handle higher current spikes, contributing to a smaller inverter.

In this case, the small-inverter drive comes from a project driven by Google and IEEE called The Little Box Challenge. Here the idea is that smaller inverters will reduce the size of the cooler-sized box that’s currently needed for a residential solar installation. That makes it less of an eyesore, reduces the footprint, and – critically – reduces cost.

If you’re not part of the Challenge yet, it’s too late; registration is closed. The final prize will be announced next January.

That said, ST also seems heavily focused on the automotive market, saying that the new diode meets the requirements for such applications as on-board battery chargers for plug-in hybrids. It has a reverse breakdown of 650 V, and they boast zero recovery time.

ST_screenshot.png
 

Image courtesy ST Microelectronics

You can find out more about these two products in the releases (Semitech and ST); you can find out more about the Little Box Challenge here.

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Jan 15, 2015

50% Deeper TSVs

posted by Bryon Moyer

We’ve been talking about through-silicon vias (TSVs) for years now, but 2.5D and 3D ICs are still trickling out at the high end.

Processing costs aside, one contributor to higher cost is the impact of TSVs on die size. While we debate the best ways to save a nanometer or two here and there, TSVs operate on a scale three orders of magnitude bigger: microns. And a good part of the reason is aspect ratio: at the current limit of 10:1 or so, then, if you want a 150-µm deep hole, you’re going to need to make it 15 µm wide. If we could improve the aspect ratio, then we could narrow down those TSVs and release some silicon area.

One of the main limiters to the aspect ratio is the ability to fill them cleanly with metal. In order to ensure that there aren’t voids along any of the surfaces, a seed layer is needed. And that seed layer has to be deposited in a well-controlled, uniform manner.

For the metals used as the seed, physical vapor deposition (PDV) – where vaporized material condenses on surfaces in a vacuum – tends to work best. But PVD also is most effective when coating a horizontal surface. Seeding a TSV is most decidedly not horizontal. You need to cover the sides and the bottom at equal rates.

TSV_Drawing.pngThat challenge notwithstanding, Tango Systems announced a couple of months ago that they have now moved the aspect-ratio bar to 15:1, using PVD. They did this through a combination of control over plasma density and vacuum as well as having magnetons that oscillate under the target. So that 15-µm-wide hole we needed to get 150 µm deep? Now it needs to be only 10 µm wide. (Why bother saving 10 nm when you can save 5000?)

Having bumped the limit by 50%, Tango thinks that this 15:1 bar will last for a while. Yes, achieving deeper might have some benefit, but at the same time as this is happening, wafers are also being thinned more, which reduces the needed depth.

TSVs are but the first application they envision for this new technology. They say that it can also have benefit for MEMS (there’s some long-term news pending there), improving the deposition of backside metals, and – their next target – providing EMI shielding.

You can find more in their announcement.

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