fish fry
Subscribe Now

Sensing a New Generation

How Wearables Will Revolutionize Prenatal Medicine

In this week’s Fish Fry we explore a whole new world of wearable technologies with Julien Penders from Bloom Technologies. Julien (co-author of “Wearable Technologies for Healthier Pregnancies”, which was published in a special issue of the Proceedings of the IEEE ) and I talk about how wearable technologies can help monitor lifestyle behaviors. We’ll be looking at the future of wearable technologies targeted for pregnancy, and discussing how these technologies pose additional challenges. Also this week, I check out Cadence’s new Innovus tool suite and reveal how it could make routing your million gate IC design just a little bit easier.

 

 

Download this episode (right click and save)

Links for July 3, 2015

More information about Bloom Technologies

Whitepaper: Wearable Sensors for Healthier Pregnancies

New Episode of Chalk Talk: Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System


Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

Darrin Billerbeck, CEO – Lattice Semiconductor

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Andy Pease, CEO – QuickLogic

Paul Kocher, President – Cryptography Research Inc.

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Adnan Hamid, CEO – Breker Technologies

Jeff Waters, VP and General Manager – Altera

Leave a Reply

featured blogs
Aug 17, 2018
If you read my post Who Put the Silicon in Silicon Valley? then you know my conclusion: Let's go with Shockley. He invented the transistor, came here, hired a bunch of young PhDs, and sent them out (by accident, not design) to create the companies, that created the compa...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Aug 15, 2018
VITA 57.4 FMC+ Standard As an ANSI/VITA member, Samtec supports the release of the new ANSI/VITA 57.4-2018 FPGA Mezzanine Card Plus Standard. VITA 57.4, also referred to as FMC+, expands upon the I/O capabilities defined in ANSI/VITA 57.1 FMC by adding two new connectors that...
Aug 14, 2018
I worked at HP in Ft. Collins, Colorado back in the 1970s. It was a heady experience. We were designing and building early, pre-PC desktop computers and we owned the market back then. The division I worked for eventually migrated to 32-bit workstations, chased from the deskto...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...