feature article
Subscribe Now

Actel’s Three-Legged Stool

 

They say good things come in threes: the Three Stooges, triple plays, the first Star Wars movies, two halves of a six-pack. Now FPGA maker Actel adds another happy trio: SmartFusion.

Actel’s triple play is a new chip that combines the three things most embedded designers need: a microprocessor, an FPGA, and analog circuitry. The company calls the conglomeration SmartFusion on the theory that it fuses three disparate features into one device.

Processors in FPGAs aren’t new, but they’re not always successful. The big FPGA companies have done it before, and every engineering undergrad has probably tried stuffing a microcontroller into an FPGA at some point. The result is usually awkward, power-hungry, slow, and expensive. Programmable logic just isn’t a good match for the resources that a processor requires.

Things got better technically with “diffused” processors on the same die as the FPGA. These didn’t use up any programmable logic but didn’t communicate with the FPGA all that well, either. Actel thinks it’s done this part right and then added some icing to the cake.

Part the First

All three parts of SmartFusion are equally important, but we’ll start with the processor. It’s the now-familiar ARM Cortex-M3, running at 100 MHz, and it comes with its own memory in the form of 64K to 512K (depending on the specific chip) of flash plus another 16K or 64K of SRAM (again, depending on the chip). The M3 is surrounded by peripherals, too, including a 10/100 Ethernet MAC, two UARTs, SPI and I2C ports, timers, RTC, and a DMA controller. In short, it looks like most Cortex-based microcontrollers that sell for $5 or so.

Part the Second

Except that it’s welded to a big FPGA. It’s the proASIC3 logic architecture, which Actel has been making for a number of years. If you’ve used Actel’s FPGAs before then SmartFusion will hold no surprises. There’s anywhere from 60,000 to 500,000 gates of programmable logic organized into 1500 to 11,000 tiles. So it’s a fairly sizable FPGA, not just a bit of logic stuck to the side of a processor.

Part the Third

Probably the most unusual part of the SmartFusion chips is their programmable analog circuitry. Analog components give most digital designers the willies; programmers and computer engineers forgot most of their “real” electronics theory about five minutes after getting their EE degree. When there’s analog design work to be done, it’s usually handed to that weird guy in the corner with the long hair and Birkenstocks. Even other electrical engineers think analog guys are nerdy.

Worry no more, because SmartFusion makes analog circuitry digital-friendly. It’s programmable in the sense that you can configure its features, functions, and interconnection in the same way that you program an FPGA. It’s basically drag-and-drop analog design, no advanced degree required. And for a great swath of the embedded-design community, that’s a welcome relief.

Encapsulated within SmartFusion’s big analog block are ADCs with 8-, 10-, or 12-bit SAR resolution – your choice. You’ll also find one or more 12-bit sigma-delta DACs, depending on the specific chip. A handful of analog comparators, current monitors, temperature monitors, and analog prescalers round out the analog block.

Well, not entirely. In addition to the genuine analog stuff, there’s also something called an analog compute engine (ACE). The ACE is a whole ’nother processor in itself, dedicated to handling just analog work. It’s sort of like a smart DMA that can offload some of the more routine analog data-movement tasks from the ARM processor. It’s more than a DMA but not quite a second processor, and it appears as a peripheral controller in the ARM processor’s memory space.

Tying It All Together

All three areas of the SmartFusion chips are tied together with big, wide buses. The ARM processor can talk to the FPGA, the FPGA can talk to the analog circuitry, the analog circuitry can talk to the processor, and so on. No mere peepholes into each other, these interconnections encourage designers to combine FPGA logic into their ARM code, for example, or to mix digital and analog circuits.

Apart from reducing two chips (a processor and an FPGA) into one and sweeping up a bunch of analog components, SmartFusion has interesting implications for security and reverse engineering. Keeping all your software, digital logic, and analog circuitry under one roof means signals and software never leave the chip. With no exposed bus transactions or code fetches, it’ll be hard for nefarious hackers to figure out what your chip is doing, much less how it’s doing it. Rub off the Actel logo and you’d make the device totally inscrutable to outsiders. 

Although the new SmartFusion chips have a fixed pool of resources like any chip, they’re infinitely reconfigurable. The ARM code is stored in on-chip flash so software patches and upgrades can be installed at any time; the FPGA logic is field-programmable by definition; the analog circuitry is reconfigurable over and over. Even the package pin-outs are changeable through programming options. SmartFusion may spell the end of blue wires on the back of prototype boards. 

 

Leave a Reply

featured blogs
Apr 25, 2024
Cadence's seven -year partnership with'¯ Team4Tech '¯has given our employees unique opportunities to harness the power of technology and engage in a three -month philanthropic project to improve the livelihood of communities in need. In Fall 2023, this partnership allowed C...
Apr 24, 2024
Learn about maskless electron beam lithography and see how Multibeam's industry-first e-beam semiconductor lithography system leverages Synopsys software.The post Synopsys and Multibeam Accelerate Innovation with First Production-Ready E-Beam Lithography System appeared fir...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Using the Vishay IHLE® to Mitigate Radiated EMI
Sponsored by Mouser Electronics and Vishay
EMI mitigation is an important design concern for a lot of different electronic systems designs. In this episode of Chalk Talk, Amelia Dalton and Tim Shafer from Vishay explore how Vishay’s IHLE power inductors can reduce radiated EMI. They also examine how the composition of these inductors can support the mitigation of EMI and how you can get started using Vishay’s IHLE® High Current Inductors in your next design.
Dec 4, 2023
19,289 views