Xilinx’s CEO Victor Peng Speaks About 7nm Everest/ACAP, Death of Moore’s Law. His Hot Chips 30 Keynote Now Online
Earlier this week, I published a detailed account of the HW/SW Programmable Engine that was the final, undisclosed block in the Xilinx Everest Architecture, to appear first in the company’s 7nm ACAP (the Adaptable Computing Acceleration Platform), which will tape out later this year. (See “Xilinx Puts a Feather in its ACAP: Final block in Xilinx’s 7nm Everest Architecture is Detailed at Hot Chips 30 in Cupertino.”) That article was largely based on a technical presentation given at Hot Chips 30 by Juanjo Noguera, the engineering director of the … Read More → "Xilinx’s CEO Victor Peng Speaks About 7nm Everest/ACAP, Death of Moore’s Law. His Hot Chips 30 Keynote Now Online"