2
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EDA: Expanding or Fading?

Most of the current EDA tools and methodology are well past their prime. The high variability in sub 45nm Silicon means you want to move to asynchronous design techniques, and the move to die-stacking means you need aggressive power management - being abl…

7
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High-Level Design for Everyone

P.S.: Twenty years ago, people were arguing against HDL's for not creating designs as optimal as schematic capture. Now, there are still cases for custom design and in the future, RTL will still be around for high performance design after C-based design t…

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The Secret Secret to Secrets

Dear friends,

Generating Random Numbers has been my Diploma Thesis, published in 1961. See
http://www.fpl.uni-kl.de/staff/hartenstein/lot/ER-1961.pdf
(sorry, in German language)

A sensor (scintillation counter) received input from radioative radi…

2
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Chaos in the Cloud

I truly enjoyed reading and feeling the article.

4
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Is Your Design Process Secure?

That's good to hear. Most of my exposure has been via safety-critical, which, by definition, is less fluid.

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