Vidya Rajagopalan, VP of Processing Platforms at Xilinx, and Dipesh Patel, VP of Technology, Physical IP Division at ARM, introduce the Zynq-7000 Extensible Processing Platform from Xilinx. This new class of product combines an industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with Xilinx unified 28nm architecture.
Delivering unrivaled levels of system performance, flexibility, scalability, and integration to developers, Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic, the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured, powerful, yet low-cost, low-power processing platform.
Rob Green, broadcast marketing manager describes how Xilinx has created a new Broadcast Connectivity Kit for our Virtex-6 FPGAs as part of our Targeted Design Platform approach for the broadcast market.
Even the best "plug and play" IP blocks are far from fool-proof. One of the most challenging aspects of IP-based design can be getting the blocks stitched together properly, making sure you have the right version of all the IP blocks, and confirming the configuration of your whole design.
Improved electronics technology will bring a new generation of devices that provide portability, connectivity, lower cost and data security. With the trend towards miniaturization comes the requirement for improved security to maintain patient confidentiality. Reliability is also a requirement, both in terms of product longevity and assurance that the device is working as specified. This is crucial for the rapidly expanding market for devices used in emergency interventions. Microsemi's nonvolatile customizable system-on-chip (cSoC) devices and FPGAs provide the right combination of features to let equipment makers deliver on all those demands.
Learn how the timing constraints wizard can be used to “completely” constrain your design. The wizard adheres to the UltraFast™ design methodology defining your clocks, clock interactions, and finally your input and output constraints. In this video, you will see the wizard transform a partially constrained design into a fully constrained design that passes timing.
This video provides an introduction to the Zynq®-7000 All Programmable SoCs / AD9361 SDR System Development Kit. The kit provides a development platform that can be used to evaluate, prototype and accelerate the development of cognitive radio and wireless small cell applications on the Zynq-7000 family of devices and the ADI AD9361 RF Agile Transceiver. The Zynq family provides an ideal hardware solution for SDR applications that demand high performance, re-configurability and low power.
This video offers details of Xilinx support for the AXI-4 Common Interconnect and highlights the benefits of increased designer productivity, greater IP availability, and extended flexibility to achieve performance and system goals. Using the Xilinx Targeted Design Platforms to illustrate these benefits, Xilinx technical experts describe how support for the AXI-4 Common Interconnect is the cornerstone for the move to FPGA Plug-and-Play design.
The UltraFast™ Design Methodology is a comprehensive design methodology enabling accelerated and predictable design cycles, delivered through the Vivado® Design Suite, a methodology guide, design checklist, self-training video, instructor-led courses, and third party tools & IP cores.
In this episode of Chalk TalkHD, Amelia chats with Tom Hill and Maureen Smerdon of Xilinx about how Spartan-6 FPGAs can accelerate your next video design, and how adding embedded vision to those designs is getting easier and easier.
In the short span of three decades, electronics have not only proliferated in our world, but have also gotten smaller and more portable. The march of Moore’s Law has brought portability to the consumer, industrial, military, medical and other markets.
This is a Cadence blog post about the launch of the Allegro PDN Analysis and what it will mean for PCB designers.
See a 2400 Mb/s DDR4 memory interface design running on an UltraScale™ FPGA demonstrate great signal quality and JEDEC compliance as verified by one of Agilent's newest test solutions, the Infinium 90000X-Series oscilloscope.
Virtex®-6 FPGAs are the industry's leading platform for designing complex systems in the fields of wired and wireless communication, storage, computing, instrumentation, automotive, industrial, and medical. Virtex-6 FPGAs not only deliver the most attractive set of features and functionality and the fastest time to market advantage, they are also paired with EasyPath™-6 technology, the fastest path to cost reduction.
Watch a selection of short videos featuring tips, tricks and processes to get the most out of designing with Altium.