Jump-Start Software Development with the SoC FPGA Virtual Target
Want to get a head start on developing software for Altera® SoC FPGA applications? Virtual prototyping tools are now available for SoC FPGA devices, enabling you to work more productively, improve your software quality, and ultimately, get to market faster. The Altera SoC FPGA Virtual Target lets you begin your software development now.
Altera's 28-nm FPGAs Optimized for Broadcast Video Applications
Increasing industry demand to deliver HD video channels requires studio equipment providers to deliver integrated products that provide the required bandwidth and processing power, while minimizing cost and power. This paper describes how Altera’s 40-nm and 28-nm FPGAs are tailored to help deliver highly-integrated, HD studio equipment products. The paper provides an analysis of the performance requirements, resource utilization, and power consumption characteristics for the format conversion of multiple video channels.
White Paper sponsored by Altera
Automotive Top Ten - Ten Points to Consider When Using Logic in Your Next Automotive Design
Automotive electronics designers have been turning more frequently to programmable logic solutions to meet the needs of their next generation designs. FPGAs offer time-to-market benefits along with simplified qualification and greater flexibility in comparison to historic ASIC-based solutions. Actel is a leading supplier of FPGAs to the automotive industry. Actel parts are being used in the most demanding mission-critical systems, such as powertrain and safety subsystems, in addition to infotainment and body electronics designs.
White Paper sponsored by Microsemi
Taking Advantage of Advances in FPGA Floating-Point IP
Recently available FPGA design tools and IP provide a substantial reduction in computational resources, as well as greatly easing the implementation effort in a floating-point datapath. Moreover, unlike digital signal processors, an FPGA can support a DSP datapath with mixed floating- and fixed-point operations, and achieve performance in excess of 100 GFLOPS. This is an important advantage, for many high-performance DSP applications only require the dynamic-range floating-point arithmetic in a subset of the total signal processing.
White Paper sponsored by Altera
Power 2 You: A Guide to Power Supply and Management Control
This free eBook provides technical details and design considerations for implementing the common circuit board power management functions. This book also provides generalized cost effective solutions for each of these functions that can be customized to meet a circuit board’s specific voltage, current and control environment.
User Guide sponsored by Lattice
LatticeECP3 Family
The LatticeECP3™ (EConomy Plus Third generation) family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES and high speed source synchronous interfaces in an economical FPGA fabric. This combination is achieved through advances in device architecture and the use of 65nm technology making the devices suitable for high-volume, high-speed, low-cost applications.
Data Sheet sponsored by Lattice
Understanding Single Event Effects (SEEs) in FPGAs
With the increasing popularity of programmable logic, FPGAs are finding their way into many applications that were once the territory of ASICs and ASSPs. At the same time, process nodes are shrinking and logic density is increasing, meaning that more of the system can be implemented in a single device. As programmable logic finds its way into avionics, communications and medical applications, designers face demands for increased reliability and safety over many of the traditional markets for FPGAs.
White Paper sponsored by Microsemi
Increased Productivity Using Team Design
Xilinx® FPGAs offer up to 2 million logic cells in capacity—and they continue to grow. Designs of this complexity usually require a team of developers, and often, a team leader, who is responsible for the synthesis and implementation of the entire design. To make matters more challenging, the developers can be located internationally, with different portions of the design developed in different locations, and even by different companies. The Xilinx Team Design flow introduced in ISE® Design Suite 13.1 focuses on solving these challenges.
White Paper sponsored by Xilinx
Using SATA for SOC Solutions on 40-nm Transceiver FPGAs
With applications needing to store more data for longer periods of time, SATA provides an efficient, cost-effective storage interface. Watch this 7-minute video for a demo showing how easy it is to take advantage of the data storage capabilities of SATA using 40-nm transceiver FPGAs.
Actel SmartFusion: Intelligent, Innovative Integration
Actel SmartFusion™ Intelligent Mixed Signal FPGAs – Innovative, Intelligent, Integration. Introducing the only device that integrates a flash FPGA, hard ARM® Cortex™-M3-based microcontroller subsystem (MSS) and programmable analog into a complete, integrated solution. Don’t compromise your embedded design. Build the system you want, with all the features you need, on a single-chip solution. Read the White Paper to learn more.
White Paper sponsored by Microsemi
Maximize Design Productivity With PCIe/104 FPGA/Processor
In this episode of Chalk TalkHD Amelia chats with Christine Van De Graaf of Kontron, who explain how Kontron is incorporating pre-made, small form factor boards, a high-performance embedded processor programmable logic into their new MSMST board and how we can get started designing with one.
Chalk Talk sponsored by Kontron
Lattice Diamond Software Overview
Lattice Diamond software includes many new features. This video overview briefly covers several new features and abilities such as the new user interface, design flow, and several tool views that are available. Other videos are available that provide more information on specific aspects of the new Lattice Diamond software.
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs
System designers will continue to be under pressure to produce higher performance systems yet maintain lower build and operational costs. DSP and Network Processing Unit (NPU) devices, coupled with low cost, low power FPGAs like the Lattice ECP3 that support Gen2 Serial RapidIO (SRIO), can provide an ideal platform for meeting these challenges.
White Paper sponsored by Lattice
SmartFusion Intelligent Mixed Signal FPGAs in Motor Control Applications
This video provides an exploration of Motor Control applications using Actel's SmartFusion™ intelligent mixed signal flash FPGAs for field-oriented closed-loop motor control for brushless DC (PMSM) motors, with a closer look at your challenges and a look into the Actel motor control development kit currently in development.
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers
Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, next-generation applications feature a wide range of data rates, from a few Mbps to hundreds of Gbps, and integrate multiple protocols and services in a single box. This paper describes how 40-nm FPGAs and ASICs with transceivers address these challenges by leveraging the advantages of leading-edge technology and reusing previous innovations.
White Paper sponsored by Altera