Interfacing High-Speed ADCs to FPGAs with Embedded Transceivers
Are you interested in the new generation of high-speed ADCs with serial interfaces? Do you believe that gigabit serial interfaces are complex? Watch this 5-minute video to see how easy it is to interface Linear Technology’s high-speed ADCs to Altera’s embedded transceiver FPGAs.
Actel SmartFusion: Intelligent, Innovative Integration
Actel SmartFusion™ Intelligent Mixed Signal FPGAs – Innovative, Intelligent, Integration. Introducing the only device that integrates a flash FPGA, hard ARM® Cortex™-M3-based microcontroller subsystem (MSS) and programmable analog into a complete, integrated solution. Don’t compromise your embedded design. Build the system you want, with all the features you need, on a single-chip solution. Read the White Paper to learn more.
White Paper sponsored by Microsemi
Timing Closure in FPGA Designs Made Easy with PlanAhead
In this episode of Chalk TalkHD Amelia chats with Frederic Rivoallon of Xilinx and they attempt to unravel the mysteries of timing closure and reveal that yes, you can get timing closure right the first time in your next design.
Chalk Talk sponsored by Xilinx
Upgrade Your Broadcast System to PCIe Gen2
For broadcast and Pro A/V applications, PCI Express (PCIe) Gen2 offers the increased bandwidth needed to support the move to 1080p60 content and enables video applications to follow the IT industry’s transition to the new standard. This webcast discusses Altera’s 4-channel solution for bridging 3G Triple-Rate SDI to PCIe Gen2.
Implementing FIR Filters and FFTs with 28nm Variable-Precision DSP Architecture
Across applications, the two most common functions implemented in FPGA-based high-performance signal processing are FIR filters and FFTs. The FPGA’s DSP architecture must be optimized to allow the most efficient implementation of these structures as this directly translates into cost and power benefits to the customer. This paper introduces the DSP architecture of the latest 28nm Altera® FPGAs and shows how this architecture enables the most efficient implementation of FIR filters and FFTs.
White Paper sponsored by Altera
High-Volume Spartan-6 FPGAs: Performance and Power Leadership by Design
The rapid change in today's design environment requires a programmable solution that provides the highest performance and lowest power at the lowest cost. To meet the needs of high-volume systems, it is essential that the solution uses the latest 45 nm high-volume technology.
White Paper sponsored by Xilinx
Enabling Low-Power EO/IR System Development with FPGAs and Image- and Sensor-Processing IP
Implementing Altera’s VIP Suite of MegaCore® functions, for sensor control and various image-processing capabilities, and Imagize’s FP-5500 compact video-processing engine, for sensor processing and image fusion, on Altera® Cyclone® IV FPGAs can kick-start development efforts for next-generation EO/IR and display systems, as well as provide a canned solution for the “boring” aspects of system design, leaving the designer free to innovate on value-add functions.
White Paper sponsored by Altera
Implementing a Multirate Uncompressed Video Interface for Broadcast Applications
The emergence of the high-definition (HD) 1080p video standard has presented some formidable design challenges for broadcast system engineers. While HD broadcasting now is established as the de facto standard for video broadcast around the world, new production equipment still must be able to handle the legacy of standard-definition (SD) and 1080i interfaces. This puts equipment manufacturers under pressure to build a cost-effective video interface solution that can handle multi-rate video.
White Paper sponsored by Altera
Adding Wi-Fi to Your FPGA Design
In the first episode of our new Chalk TalkHD series, Amelia Dalton talks to Bob Potock from Altium as they add Wi-Fi to an FPGA-based embedded system.
Chalk Talk sponsored by Altium
See PCI Express Hard IP Demo on Low-Cost FPGA
Concerned about power consumption and device cost? Watch this 7-minute video to learn about a development kit featuring a low-cost FPGA that addresses both of these challenges. What's more, the FPGA family features the only low-cost device with PCI Express x4 functionality.
Dynamic Power Reduction in Flash FPGAs
Due to the dramatic increase in portable and battery-operated applications, lower power consumption has become a necessity in order to prolong battery life. Power consumption is an important part of the equation determining the end product's size, weight, and efficiency. FPGAs are becoming more attractive for these applications due to their shorter product life cycle.
5 Reasons to Use a Soft-Core MIPS Processor in Your Next Custom Design
Now there’s a 100 percent MIPS-compatible soft processor available just for Altera® FPGAs and HardCopy® ASICs. The MP32 is also the industry’s first soft processor that runs the VxWorks operating system. Watch this 10-minute video to learn five reasons why you should use MP32 in your next custom embedded design.
Reducing Power Consumption and Increasing Bandwidth on 28nm FPGAs
Lower power consumption and higher bandwidth are now the two dominant requirements in designing next-generation high-end applications. The global trend across multiple markets is for higher bandwidth in the same footprint at the same or lower power and cost. The Internet is going mobile and video is driving bandwidth requirements at a growth rate of 50% year on year. The march to 40G and 100G systems (with 400G on the horizon) is underway to support this ever-growing bandwidth demand. Fierce competition is driving down prices. Space constraints abound, and cooling solutions often dominate the power budget, sometimes up to twice the power consumption of the electronics. The next generation of 28-nm high-end Altera® FPGAs addresses these challenges through leading-edge technological innovation, integration, and reduced power consumption.
White Paper sponsored by Altera
Optimize Your 28-nm FPGA Design for Maximum Performance
Want the best performance from your 28-nm FPGA design? Find out how you can make optimal use of Altera's 28-nm architecture to maximize your system performance. Watch this 10-minute webcast to learn about: Our 28-nm architecture innovations, Recommended design optimization techniques and Quartus® II software automated optimization tool.
High Voltage, Precision, Battery Stack Monitor
The LTC®6802 is a highly integrated multicell battery monitoring IC, capable of measuring up to 12 individual battery cell voltages. Using a novel serial data communication technique, multiple LTC6802s can be stacked in series without optocouplers or isolators, allowing precision voltage monitoring of every cell for 1000V+ systems. With high ESD, EMI and noise immunity, the LTC6802 stands up to real world conditions in a range of automotive and industrial applications.
White Paper sponsored by Linear Technology