Max 10 Kills the CPLD

Altera Redefines Non-volatile FPGAs

by Kevin Morris

The venerable CPLD (Complex Programmable Logic Device), forefather of today’s flourishing FPGA and programmable logic industry, died peacefully in its sleep last night of natural causes. No memorial services are planned. The CPLD is survived by an incredible array of modern, capable devices that take the concept of programmable hardware to places never envisioned by the stately senior sum-of-products statesman.

If you visit the Wikipedia page for “CPLD” you will find a picture of an Altera MAX device (EPM7128), a 2,500 gate-equivalent, 128 macrocell “second generation” CPLD (or “EPLD” as the company was spinning it in those days) which, according to the datasheet, was capable of implementing “complete system-level designs.” That is, of course, if you were designing a “system” that could be implemented in well under 2,500 gates, was all digital, and had a 2-digit number of IOs.

 

Expanding EDA

Newer Tools Let You Do More than Just Electronics

by Bryon Moyer

Welcome to autumn. It’s usually a busy season – although the activity typically starts more with the onset of September and the resumption of school than with the equinox. But it also comes on the heels of a quiet season, even in the overworked US.

And EDA has seemed moderately quiet. So I started looking around to see what I might have been missing, and I’m not sure there’s a lot. But it did get me musing on why things might be quiet for the moment as well as what fills the gap – which gets to the topic of what qualifies as EDA. It’s more than you might think.

At the risk of being obviously over-simple, the legions of coders in EDA-land are doing one of two things: building new technologies or improving on old ones. The new technology category might include support for FinFETs or multi-patterning or the design kits for the latest silicon node. The improvement side of the tree is where performance and capacity and usability are juiced up – all in the name of productivity, of course.

 

The Four Horsemen

What Does the Future Hold for the Semiconductor Industry?

by Dick Selwood

When I looked at the forecasts from London-based analysis company Future Horizons this time last year (Malcolmy: Entrails, Crystal Balls and Spreadsheets), I saw that they predicted that, while short-term (through 2014) sales volumes were set to increase, the long-term future of the industry was looking a little less than rosy. A year on, the picture Malcolm Penn, the MD of Future Horizons, is painting is much the same, with the pessimism for the long term even more marked.

First - the good news: Penn has revised upwards his forecast for the number of ICs shipping. His downside forecast shows growth of 9.8% and his upside predicts growth of 11.2%. For 2015 he is going for 15% growth, perhaps more.

 

Makers Conquer the World

From Artisan to Arduino at World Maker Faire

by Kevin Morris

We walk past a small booth at the 2014 World Maker Faire, and a young boy, perhaps eight or nine years old, jumps out to get our attention. He is so excited we can barely understand what he is saying. He wants us to see his sneakers - adorned with an array of LEDs giving a high-energy light show that would make any grade-schooler envious. He explains that he programmed the lights himself. He is ecstatic, and his enthusiasm radiates into the crowd. “Can I sign you up? Can I sign you up?” He pulls up a registration form on a laptop computer. We have no idea what he wants us to sign up for.

A look inside the sneakers reveals an Arduino board with its obligatory Atmel AVR microcontroller. Sitting on the table nearby is another laptop - running a kid-friendly drag-and-drop programming interface that allows kids to write code to create their own shoe-wear lighting spectacular. You want blinky shoes? You gotta program them first. It’s gonna be FUN!

 

Go-Fast FPGA Design

Helpful Hot-Rodding Hints

by Kevin Morris

Most of us engineers are at least closet hot-rodders. It’s in our DNA. No matter how good a contraption is from the factory, we just can’t resist the temptation to tweak a few things in our own special way, and often that’s all about speed.

FPGA design, it turns out, is a big ‘ol blank canvas for hot-rodding. Even though we (fortunately) don’t have glossy convenience-store magazines adorned with scantily-clad models standing next to the latest tricked-out dev boards, FPGAs have all the tools we need to rev our creative motors in the never-ending quest for that extra little bit of personalized performance.

But, where do we start? Do FPGAs have a set of go-to hop-ups? Is there a “chopping and channeling” baseline for programmable logic design?

It turns out the answer is “yes.” And, just to get you started, here are five tips for turning up the boost on your next project:

 

Going Vertical

Ecosystem for Interposer-based Design?

by Kevin Morris

We’ve talked a lot lately in these pages about the impending demise of Moore’s Law. Consensus is that, somewhere around the half-century mark, one of the most astounding prophecies in human history will have finally run its course. Next year, we’ll have a round of FinFET devices that will be so exotic and expensive that only a handful of companies will be able to use them. In the decade that follows, we may or may not reach 10nm and 7nm production - using either esoteric unlikelies like EUV or extreme-brute-force multi-patterning techniques - to solve just some of the multitude of barriers to continued downscaling.

Sci-fi techniques like carbon nanotubes, graphene-based devices, quantum computing, and that other-one-you-read-about are so far from production practicality that we may not see any of them in widespread use in our lifetimes. While incredible research shows great promise for many of these ideas, they are all back in the silicon-equivalent of the early 1960s in their evolution. The time and engineering it will take them to catch up with and eventually surpass what we can do with silicon today is substantial.

 

There’s a Processor in My FPGA!

Hey, There’s LUT Fabric in my SoC!

by Kevin Morris

The idea of processors and FPGAs working together is exactly as old as the idea of FPGAs. Perhaps older, in fact, because even the prehistoric pre-FPGA PLDs often showed up on CPU boards - palling up with the hot processors of the day (which boasted 8 full bits of bone-crushing capability - at speeds of over a megahertz!) Of course, those programmable devices were mostly doing “glue logic” work - connecting up things that weren’t easy to connect otherwise.

Since those early days, processors and programmable logic have enjoyed a long and romantic partnership - spending long lazy days gazing lovingly into each other’s IO ports, exchanging data (and some control signals as well), and enriching each other’s lives through mutual cooperation. The partnership was never equal, though. Processors got all the glamour and recognition. Debutante CPUs would burst onto the red carpet with wider words and faster clocks, and they’d barely give a nod to their loyal FPGA companions who worked silently in the shadows, doing all the dirty work.

 

Superstar

The Truth About Engineering Talent

by Kevin Morris

People who are sports fans often watch in amazement when a superstar athlete gets a contract worth tens of millions of dollars. “Why,” they ask, “is kicking or throwing a ball worth that kind of money? And with millions of talented people who spend their entire lives practicing this sport, why is this particular one deserving of that kind of compensation?”

We all wonder this.

Then, we realize that, in many cases, most of the crowd gathers primarily to watch the performance of that one superstar. Take him or her away and it’s just another game. To prove that, watch what happens in the US when a professional sports league goes on strike and the teams bring in temporary “replacement” players. The audience leaves in droves. People don’t watch on TV - except perhaps from schadenfreude. Even though the replacement players are top-notch professionals in their own right, they don’t bring the superstar magic to the performance. The result is simply ordinary excellence, with all too many tell-tale signs that even skilled professionals are just human after all.

 

A Horse of a Different Color

Advanced vs. Established Process Geometries

by Amelia Dalton

It's time to saddle up and ride into the semiconductor sunset! Whether you're hitchin' your wagon to a young whipper-snapper node, or lassoin' a long-in-the-tooth workhorse process, the time it takes to get your IC design up and out of the corral may depend more on the software you use to verify your design than on the silicon itself. In this week's Fish Fry, Mary Ann White (Synopsys) and I get down to the very heart of semiconductor design: process geometries. We have ourselves a good ol' time chatting about challenges of FinFET designs, the tricky bits of working with both advanced and established process nodes, and how the right tools can make all the difference when it comes to winning the big product-to-market rodeo.

 

Middle Child Syndrome

Is 20nm the Forgotten FPGA Node?

by Kevin Morris

28nm is a calm, mature node. Sure, everyone was excited when it was the first to reach modern price, performance, and cost levels. We applauded when ARM processing subsystems were integrated into 28nm FPGAs, creating a new class of device. And there were accolades when 28nm debuted interposer-based 2.5D packaging techniques. There is even a nice page in the scrapbook where 28nm SerDes transceivers hit 28Gbps speeds - a nice 28/28 symmetry that made everyone feel all warm and fuzzy.

We all know and love 28nm. It’s out there - proven and in full production, making our real-world designs really work today. It’s great! You really can’t go wrong with any of Xilinx’s or Altera’s robust 28nm offerings - from cost-optimized, higher-volume Kintex and Arria chips up to the biggest, fastest, most feature-laden Virtex-7 and Stratix V devices, 28nm FPGAs have you covered.

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