Your Ticket to Space

From Space Travel to RTL Analysis and Back Again

by Amelia Dalton

In this week’s Fish Fry we look into Excalibur Almaz’s plans to launch people into space. We investigate how they plan to get their space tourism business off the ground, what kind of space technology they are going to employ, and what their motivations may be for launching this high-flying company. In the second half of the broadcast, I ask Shakeel Jeeawoody (Blue Pearl Software) what Blue Pearl is all about, how they are working with Synopsys within the Symplify Pro platform, and what was happening at their recent Design Automation Conference panel.

 

Chasing Rainbows

The Myth of ASIC Replacement

by Kevin Morris

With the predictability of a sunrise, the Moore’s Law heartbeat has throbbed its way into the collective consciousness of electronic designers. Every two years or so, the industry visits upon itself a new semiconductor process node, and the implications of that change ripple across the surface of the already-turbulent waters of the industry. Each time, we are amazed anew. Each time, we have to re-write our understanding. Each time, we are emboldened to go out into the world and announce, “Now, we have finally arrived! FPGAs can replace ASICs once and for all!” Then, we see our shadow and go back underground for two more years of winter.

 

“I Made That”

The Importance of Fun Projects in Engineering

by Jim Turley

Most little kids want to grow up to be cowboys, ballerinas, astronauts, or firemen. Not you. You wanted to be an engineer, didn’t you? You wanted to make stuff.

I’m willing bet you didn’t become an engineer or a programmer by accident. You chose that career. You weren’t born into it. You probably didn’t inherit your father’s engineering practice. Your family doesn’t come from a long line of engineers that expected you to uphold the family tradition. You weren’t assigned to Job Classification 35.984.001 by an immense and bureaucratic government agency.

You’re an engineer because you like it.

 

It Might Get Complicated

Synopsys Solves Sonic Stress with Audio IP

by Kevin Morris

Jack White’s manic bawl floats like frenetic frosting over a raucous clipped riff from the Parsons Triple Jet. The live recording is a mess, mixed by a near-deaf sound engineer whose thirty years at the same venue has seen his perception of sound gradually distort into a grotesque caricature of the once legendary acoustics of the house like an audio homage to Tammy Faye’s makeup artist.

Luckily, the engineers mastering the CD were on their game, and the right noises ended up in the right places - banishing the bad memory of the concert acoustics to the round of the roadies’ repeated post-concert tales. The mix was mashed into a stream of bits - encoded and enshrined - waiting for your SoC to reincarnate the Raconteurs that never were for the eager ears of your customers.

Your SoC can do audio, right?

 

Flexras Makes a Finer Cut

FPGA Partitioning for the Modern Era

by Kevin Morris

If you’ve worked with large designs that need to be partitioned into multiple FPGAs, you’ve probably often thought how awesome automatic partitioning would be. You just throw your big’ol design at a fancy EDA tool, push the big green “GO” button, and BAM! Your whole design is sliced up into pieces - just like in one of those martial arts movies where the ninja slices the bad guy into about seven pieces so cleanly that he doesn’t even start to fall apart right away.

Your design would be cleanly ninja-sliced into perfect partitions that fit easily into your target FPGAs with the minimal number of inter-FPGA connections. You’d have no timing problems whatsoever, and you’d barely notice that your design wasn’t running on one big super-FPGA. Absolutely no manual intervention was required.

 

Not Your Mama's DAC

by Amelia Dalton

In this week's Fish Fry, I check out the 2012 Design Automation Conference in San Francisco, California. But we're not just covering the wide range of EDA tools at the show. Oh no, we're checking out the village that is the Design Automation Conference. To add another layer of excitement, we've got not one but three C-Level interviews to throw your way, starting with the foundry guys who use EDA tools (Jack Harding, CEO - eSilicon), then on to the VHDL parser platforms that practically every EDA company uses (Michiel Ligthart, COO, Verific) and finally to the guys who break things for a living (Adnan Hamid CEO, Breker Technologies).

 

Heterogeneous FPGAs are Here!

Well, Kinda’

by Kevin Morris

In the wild world of semiconductor marketing, it is often difficult to tell what is true, what is false, what is hoped or wished, and what is probably-going-to-be-true-pretty-soon (so we’ll just go ahead as if it were true anyway).

3D FPGAs are like that.

We all want 3D FPGAs, right? Right? Well, maybe, uh - 3D ones certainly seem like they’d be an improvement over 2D ones and - I enjoyed “Avatar,” but my friend got motion sickness... OK, what can 3D FPGAs do that 2D ones can’t?

 

Soft Everything

Designing Complexity

by Kevin Morris

We talk a lot in these pages about programmable this and programmable that. In our efforts to make slivers of silicon do our increasingly complex bidding, we need some way to communicate our intent to our chips and to incite them to behave accordingly. In our happy little engineering silos, of course, we separate all these types of “programming” out into various disciplines - firmware, middleware, OS, application software, drivers, FPGA fabric, analog configurations, transceiver settings… The list goes on and on.

 

Who’s the Competition Now?

FPGA Companies Enter New Arenas

by Kevin Morris

Life is simple in a duopoly.

They say that nothing unites people more than a common enemy. If you want everyone in your company to be motivated and working toward one common goal, nothing is more powerful than a single, identifiable competitor at whom you can unleash the full force of your company’s competitive fury. The singularity of vision required for good teamwork is supplied for you - almost by magic. People do not have to believe in some abstract vision of the future handed down from executive management of dubious origin and questionable motives. Rather, they can identify for themselves the goals and objectives in a common-sense plan for taking down the adversary.

 

MIPS Plants a New Family Tree

“Aptiv” Line of Processors: the Start of a New Generation

by Jim Turley

Blame BMW. Or maybe Sears, Roebuck & Co. The trend of classifying all your products into clearly defined low, middle, and high ranges has now extended its grasp to MIPS Technologies.

Carmakers figured out a long time ago that it would help sell cars if consumers could keep all the confusing model numbers straight. Thus, General Motors had its Chevrolet brand (low end), its Buicks (midrange), and its Cadillacs (high end). That branding strategy served the company quite well, even when all three cars were actually the same vehicle with different hood ornaments.

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