Synopsys Attacks SEUs in FPGAs
A few years ago, one FPGA vendor, Actel, was quietly shouting in the corner. “Hey! Single event upsets (SEUs) are a big problem for FPGAs!”
The other FPGA companies replied with a thoughtful technical analysis of the situation: “Hey, Actel - SHUT UP!”
OK, maybe that’s not exactly the way it went down, but the idea is basically right. You see, Actel’s history is in super-high-reliability FPGAs for use in space. Up in space, there are lots of tiny particles flying around with a lot of energy. When one of those particles hits a vulnerable part of an IC (like a storage element of some kind), it can flip the bit from one to zero or zero to one. As your razor-sharp digital design mind might be telling you right now, this is really bad.
This week’s Fish Fry is all about Design West 2012, and at the conference this year I check out each layer of the embedded systems ecosystem--from distributors to MEMS, from microcontrollers to operating systems. In the first part of my coverage, I interview Jeff Jussel of element14 about element14’s connection to the Raspberry Pi computer and how element14 is looking to foster collaboration on every level of electronic engineering. Next, I chat with Gordon Cooper, Tony Xia, and Amit Bhojraj from NXP about their new product availability strategy, the analog sub-system included in their new microcontroller, and how Angry Birds worked its way into their booth this year. I also give an update on the “Find Amelia at Design West” contest and interview the winner of last week’s MAX V CPLD Development Kit.
When Do We Have Enough?
Following the semiconductor industry for the past few decades, we’ve seen something unprecedented in human history. There has been a sustained exponential growth that has survived for over four decades, with resulting numbers that are absolutely mind-boggling. Analysts and writers have struggled to find the appropriate metaphors: “If the auto industry had done this, all cars would now travel faster than the speed of light and get over a million miles per gallon.” The attempts all seem to fall short of giving the audience a grasp of the magnitude of this accomplishment.
Calypto’s Power Optimization and the Find Amelia at Design West Contest
In this week’s Fish Fry, I dig into the multi-layered world of power optimization with Shawn McCloud (Vice President, Marketing - Calypto). Shawn and I discuss the problems surrounding power reduction in today’s smaller geometries, and why he thinks power optimization is ignored by many designers. I even grill Shawn about why he has a ban on high heels at his house. Also this week, I unveil the details of EE Journal’s first conference contest called “Find Amelia at Design West” and even throw out a couple super secret hints on how you can find me and win a MAX V CPLD Development Kit (courtesy of Altera) right there at the show.
XMOS Turns Software Into Hardware – Presto!
Subtle definitions can make a difference. The old song title, “What Is This Thing Called Love” is a lot different than asking your spouse, “what is this thing called, love?”
So it is with XMOS’s new chip, the XS1. Is it an FPGA or a microprocessor? Perhaps it’s the much-touted system-on-a-chip? Maybe an ASIC replacement? Or possibly something entirely different? By the time you’ve finished the 15-second elevator pitch, you’re already confused. What is this thing, how does it work, and how do I use it in my design?
MOST, Nvidia, Spansion, and Other Stories
Modern automobiles are miracles of engineering refinement. Probably no other technology-related product calls from as many disciplines, has endured the same level of long-term evolution, has been actively used by more people, and has seen such steady long-term progress in capability, safety, and efficiency as your average family car. Each year, car companies take mountains of data and user feedback and pipe it into their engineering process, which results in an evolved, improved, safer product - most of the time, anyway.
Look out! A new way to verify is coming your way. In this week’s Fish Fry, I check out Synopsys’s new Verification IP announcement with a special in-depth interview with Neil Mullinger from Synopsys. Neil and I discuss the details of this new verification platform, what markets it's destined for, and why whipping up your own verification IP may be a thing of the past. Also this week, I look into a new development in transistor technology headed up by a team at the University of Tel Aviv and why it may or may not involve deli meat.
Altera’s 28nm FPGAs Hit the Streets
Altera announced this week that production shipments of their high-performance Stratix V 28nm FPGAs have begun. While we’ve been talking for a couple of years now about all the advantages that the 28nm node will bring to the FPGA landscape, this announcement is probably the most important sign that the rubber is actually meeting the road when it comes to delivering those benefits to the world.
This week’s Fish Fry is all about those persistent pesky power problems that plague our designs and what we can do to solve them. If you’re a digital guy or gal struggling to get into the analog game, or even if you’re an analog person trying your hand at digital design, this Fish Fry is for you. First, I interview Steve Logan (Xilinx) about how Xilinx has added analog ADCs to their recent development kits and how you can start designing with one. I also chat with Rob Chiacchia (Linear Technology) about the state of the art in digital power management.
MathWorks Automates HDL Creation
Quick! What’s the fourth largest EDA company in the world? Most of us in the industry can rattle off the “Big 3” right? “Daisy, Mentor, Valid.” Oops, my time machine was off by about 30 years. How about “Synopsys, Mentor, Cadence”? After that, it gets a bit dicey - if we counted Magma, that would be a possibility, but we need to chalk them up to Synopsys now. For those of us who think FPGA companies are actually EDA companies with a different business model, Xilinx and Altera would be in the top four or five. Beyond that, it drops off -- a lot.