FPGA Fone Fusion

Lattice Targets Always-On Apps

by Bryon Moyer

Here’s one possible way to not get a job. Let’s say the interviewer asks you about things inside a cell phone. And you, having an FPGA background, suggest that there’s an opportunity for some great FPGA usage inside said phone.

Yeah… you’re likely to get a polite, “That’s interesting…” and a note, “FPGA guy with an FPGA hammer… and every system is his nail, even if it has a Philips head on it… Pass…”

No one puts baby in the corner, and no one puts FPGAs in phones or small mobile devices! Why? Well, duh… First, they’re ginormous. And second, they’d suck the battery dry by the time the thing booted up. I mean, the only device less likely to be considered would be a real-deal, old-school vacuum tube. Right? (Although audiophiles would probably totally dig that…)


FPGAs Ready-to-Eat

QuickLogic Does the Cooking For You

by Kevin Morris

The FPGA market is a wasteland - littered with the battered corpses of startup companies who thought they could build a better mousetrap. They attacked the strongholds of market leaders Xilinx and Altera and ended up paying the ultimate price. But none of these entrepreneurs were dummies. In fact, in just about every case they had a novel idea that brought significant advantages to the programmable logic designer.

The reason they failed, however, was remarkably consistent. It wasn’t because they had inferior chips. In fact, they often had devices with improved capabilities for whatever segment of the FPGA market they were attacking. It wasn’t because they didn’t know their customer, either. Most of them had a well-targeted marketing plan designed to win strategic business in key segments of the industry.


The Hard Ceiling

Power Plays the Death Card

by Kevin Morris

Moore’s Law is a maddening mistress. As our engineering community has collectively held the tail of this comet for the past forty-seven years, we’ve desperately struggled to divine its limits. Where and why will it all end? Will lithography run out of gas, brining the exponential curve of semiconductor progress to a halt? Will packaging and IO constraints become so tight that more transistors would make no difference? Or, will economics bring the whole house of cards crashing down - putting us in a situation where there is just no profit in pushing the process envelope?

These are still questions that keep many of us employed - predicting, prognosticating, and pontificating from our virtual pedestals - trying to read the technological tea leaves and triangulate a trend line that will serve up that special insight we seek. We want to know the form of the destructor. When the exponential constants of almost fifty years make a tectonic shift and our career-long assumptions change forever, we’d appreciate some forewarning. We want to look the end of an era in the eye.


ARMing a New Generation

Altera Announces Processor Architecture for Gen X

by Kevin Morris

The future of FPGA-based processors is coming into focus. Altera just announced that the processor architecture for their upcoming “Generation 10” Stratix FPGA family will be the ARM Cortex-A53. Pretty clear, eh? OK, that’s it. End of article. Move on along.

What? Still have questions? What does it all mean?

To review, Altera has announced that their next Stratix family (Generation 10) will be built on Intel’s 14nm Tri-Gate (FinFET) process. As we have discussed before, Altera is currently in a race with archrival Xilinx, whose first FinFET FPGAs will be riding in on TSMC’s 16nm FinFET process. Which horse is faster?


FPGAs Fuel (Sensor) Fusion

QuickLogic Announces Ultra-Low-Power Sensor Hub

by Kevin Morris

Sensors are literally taking over the world. Projections vary as to actual numbers - some say we will reach a trillion - but it is safe to say that we are in the middle of an exponential explosion in the number of sensors deployed in the world. Beyond the obvious gajillions in smartphones, sensors are being designed into just about every kind of embedded system you can imagine. All those sensors promise a revolution in the real-world intelligence of the systems we all design.

One of the biggest problems with putting sensors into our systems is - they’re kinda high-maintenance from a processing point of view. All day long, like cranky little toddlers, they keep dribbling out data and wanting us to deal with it. If you get very many sensors in your system, you really need a nanny to take care of them all, so you can get back to the important business of letting your embedded computer do some embedded computing.


It's an Analog World - Even for Digital Folks

Signal- and Power-Integrity Take Center Stage

by Kevin Morris

Let’s face it, we went to school and studied logic design because we really didn’t want to deal with analog stuff. As digital designers, we prefer our signals to have nice discrete values and to stay out of those fuzzy grey areas. We may have even settled into a clean, orderly area of engineering like FPGA design - just to preserve a firewall between us and that nasty curvy stuff.

Then, of course, our arrogant “need for speed” brought us to things like multi-gigabit serial interfaces. Suddenly, what should have been a well-behaved sequence of zeroes and ones took on a suspicious likeness to those wavy analog lines we were trying to avoid in the first place. We justified it by pointing to the benefits of getting rid of all those unsightly parallel busses. Still, terms like “eye diagram” entered our vernacular - and the next thing you know, somebody was talking about signal integrity. Yuk!


Ten Years

Happy Birthday to Us

by Kevin Morris

Ten years ago, we had a vision - a vision of a new kind of trade publication: one that was completely digital; one that gave top-quality objective analysis and editorial on the electronics industry; one with a personality and a sense of humor that made professional engineering articles fun and interesting as well as informative; one staffed by people with firsthand experience in the engineering trenches and deep knowledge of the industry.

Then, we said, “Nah,” and created this one instead.

OK, kidding aside, this is our ten-year anniversary and we wanted to at least build a little digital bonfire and sit around it talking about the old days when we did three-micron tapeouts with actual tape, and when we put green magic marker around the edge of our software CDs in hopes of reducing the number of bugs. (Hey, if it was supposed to make CD music sound better, worth a try, right?)


Digital Duct Tape

Lattice Launches MachXO3

by Kevin Morris

There are two “go-to” products in the mechanical world - duct tape and WD-40. WD-40 for things that are stuck together and are not supposed to be, and duct tape for things that are not stuck together, but we want them to be.

The digital world has its duct tape too, of course. When you have two parts of your design that aren’t designed to talk to each other, you need some nice, sticky gates in between that will allow tab A to fit slot B, and not in a parallel-peg-in-a-serial-hole kinda’ way. In the old days, this was the job of “complex programmable logic devices” (CPLDs). Now, of course, CPLDs have pretty much gone the way of the dodo, and even devices formerly known as CPLDs are now made with LUTs - a decidedly FPGA-like feature.


The FPGA is Half Full

Unwinding the Marketing Spin

by Kevin Morris

Let’s say you are looking for a new house for your family. You’ve got a couple of contenders. One has four bedrooms, three baths, a two-car garage, and 3,000 square feet of living area. The other has three bedrooms, three baths, a three-car garage, and 3,200 square feet of living area.

Lining the two data sheets up, the houses are comparable. One shows a bit more living area, the other has an additional bedroom (which you would just use for a guest room anyway), and the additional garage isn’t much of a factor, since your family owns only two cars.

Weighing the two choices based on the data sheet makes sense - until you start reading the fine print. House #1, it turns out, doesn’t actually have 3,000 square feet. To get that number, they included a section of the yard that is covered by a roof, and the square footage number is “effective square feet.” Another footnote says that they have estimated the effective square feet based on a “livability factor,” since they deem the living space to be extra-efficient.


Power Puzzle

FPGA Power Doesn't Work Like You Think

by Kevin Morris

We all learned about power in EE101, right? You know, voltage times current - bam, we're done. Easy as Ohm's Law. Of course that was just for DC, and we had to learn how to do all that RMS stuff for signals that wiggle. Still, we left engineering school having a pretty good feeling that we had this whole power thing under control.

Fast forward a few years and we're in industry, designing digital circuits. We learn that we can make some broad assumptions about power, and those hold true for most everything we design. We learned things like lower supply voltages mean lower power, and that the more toggles we do, the more power we burn. If we could turn off parts of our circuit when we didn't need them, we used less power. It was the same lesson our Mom taught us about turning out the lights at home.

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