Lattice’s Tiny FPGA Packs a Punch
In a comic-book universe crowded with superheroes, Ant Man was a standout. While all the other characters were going bigger, faster, and stronger, Ant Man’s superpower was being small. Being small, it turns out, let him do things that no other crime fighter could accomplish.
Lattice Semiconductor just unveiled the world’s smallest FPGA. In a design domain where bigger and faster rule the day, where bragging rights in the programmable logic paradigm hinge on having the most pins, the biggest package, and the fastest SerDes, Lattice apparently took a page from the Marvel Comics playbook and went all Ant Man on us.
Xilinx and Altera Square Off on the Future
If you have a visit with Xilinx and Altera these days and ask them about FPGA design methods above and beyond RTL, you’ll get very different answers. Xilinx will tell you they’re having great success with high-level synthesis (HLS). Altera will tell you that OpenCL is the wave of the future. Both sides make compelling arguments, which sound like they have nothing whatsoever in common. What does it all mean?
We all know that RTL design is tedious, complicated, and inefficient. We’ve known it for twenty years, in fact. To paraphrase Winston Churchill: RTL is the worst possible way to design electronics - except for all of the other ways that have been tried. (OK, and we know - Churchill was actually paraphrasing someone else. See? IP re-use works, even in politics!)
(and Other Adventures in Fish Fry Land)
Fish Fry is coming to you from the beautiful island nation of Singapore this week. We're checking out the best geeky hotpots this fine country has to offer including a visit to GLOBALFOUNDRIES - the second largest independent semiconductor company in the world, a tour of the Funan Digital Life Mall, and some serious LEGO action at the ScienceArt Museum.
It’s Getting Hot at the Top
The FPGA market is, in many ways, a microcosm of the explosive and volatile semiconductor industry. FPGAs leapt to the front of the line in new process technologies about a decade ago - assuming the role of canaries in the Moore’s Law mines. Every time the semiconductor industry managed to reach a new technological milestone, FPGA companies raced to get the first devices to market - in order to capitalize on the bounty of the new node.
Unlike other semiconductor devices - processors, memory, etc. - FPGAs are in a unique position to take maximum advantage of Moore’s Law improvements in semiconductor technology. FPGA companies turn this technology advantage into market advantages - and into some of the biggest margins in the world of semiconductors. Each new process node brings a bounty to the world of FPGAs - usually in the form of lower power consumption, greater density (and thus greater functionality), larger IO capacity and bandwidth, and - to a lesser degree, more speed.
DVCon, Aldec Meets Hitatchi, and Parties Galore
In honor of DVCon this week, we're rounding up all the verification jokes we can muster. "I just finished verifying my multicores and boy are my ARMs tired." Or maybe: "How many verification engineers does it take to change a lightbulb?" "None, of course - but they will be able to confirm that the bulb has actually been changed." Or how about: "Seriously folks - take my dev-kit... Please!"
Achronix FPGAs Disrupt the Status Quo
For two decades, the FPGA market has been a well-balanced duopoly - a yin and yang cocktail of equal but opposing forces arranged in perfect discordant harmony. Xilinx and Altera have acted as a matched pair of mutual predators in the evolution of a market that has played an important role in the electronics ecosystem. For every Xilinx action there was an equal and opposite Altera reaction. Each Altera thrust was met by a Xilinx parry followed by an Altera riposte.
The foils in this twenty-year fence-o-thon have clearly been semiconductor processes. There were huge rewards - in both cash and market share - to whichever company could successfully harness each new process node first (and we mean actually harness - defined as delivering working silicon in volume to their customers, rather than “marketing harness” - defined as being the first to issue a press release bragging about the new node.) The two titans have generally taken turns winning at each process generation, and the market share line has slowly swayed back and forth like a tide with a two-year time period.
Achronix Shakes Up The FPGA Scene
As the ‘70s rock band the Eagles put it so appropriately, “They will never forget you until somebody new comes along.” Hey Xilinx and Altera, there’s a new kid in town...and he’s got a big brother will a lot of money, power, and a hot new process technology. This week's Fish Fry is all about the biggest EE news to hit the streets, Achronix (with Intel) is now shipping their Speedster22i FPGAs and the programmable marketplace may never look the same again. My guest is Robert Blake (CEO - Achronix) and we’re gonna get into the details of this announcement and check out where Achronix is headed.
Cyclos Brings the Past Into the Future
Back in the old days, they really knew how to make clocks. Their energy sources were less than ideal - usually a big tensioned spring or an elevated mass on a chain. They wanted whatever energy they stored there to last as long as possible, as it was usually recharged manually by humans. Their go-to solution was simple harmonic motion - usually in the form of a pendulum. As long as they tuned the resonant frequency of the pendulum to the frequency they needed for their clock, the system would tick and tock for days - at a steady pace - using very little of the precious stored energy.
It was all about resonance.
Plunify Sends FPGA Tools Aloft
The Cloud… Oh, the Cloud. Always right there, the answer to all our IT problems, and yet… and yet… for designers, the promise seems to remain just out of reach as deal-breakers remain to be solved.
We’ve looked at cloud computing before, and we’ve seen new companies enter and leave the cloud. And opinions are certainly not solidly aligned behind the concept. But the discussions have largely involved EDA companies or other tools. Completely missing from the conversation have been what are probably the most universally used tools of all: FPGA tools.
Cadence Rolls Sigrity and Allegro - Together
Board design and layout used to be so simple. All you had to do was make sure that all the metal parts that were supposed to touch did, and all the metal parts that were not supposed to touch didn't. Handy software tools did all the heavy lifting, and there were about a zillion different possible layout solutions - all of which worked.
That was back in the day - before all this high-speed serial nonsense. Now, thanks to our multi-gigabit lifestyle, just making the metal touch doesn't cut it anymore. We have to worry about signal integrity (SI). All those zeroes and ones flying through PCB traces start to cut corners, and our eyes slowly begin to close…