Which is Where Your Users Are
Sometime during the last twelve months at one of the typical industry conferences, I took a typical briefing. To us in the journalism world, a “briefing” is when a company sits down with an editor like me and tells a story. Their hope is that we will retell that story. Because if the story comes from their pen, it sounds like marketing; if it comes from our pen, it sounds like journalism, which gives it an extra air of legitimacy.
Of course, if you’re like me or my EE Journal colleagues, you probably take their story, invert it, fold it ten ways, look at that one pointy bit, and focus on that. It all comes out very different from the original (but hopefully the facts are correct).
System Engineering the User Experience
A few weeks ago, my esteemed colleague Bryon Moyer wrote an article entitled "Just Who Is the Customer?" In this article, he identifies the "toll-taker" or "gatekeeper" as a sort of semi-villain who takes decision power away from the consumer for his own gain. Bryon makes a well-supported case, but I'd like to propose an alternative question and an alternative explanation:
Just What is the Product?
As electronic engineers, we design things like circuits, chips, boards, boxes, and "systems." It is very rare that we design something that stands atomically and autonomously alone. Just about everything we envision and engineer is a cog in some larger machine, and just about everything we design uses someone else's end product as a component. We take the products of others' work, add our value, and hand that up the food chain to some other team who adds their value, and so on.
Zuken Expands Scope and Reach
Most of us have heard of Zuken. They have always been one of the quiet companies who made PCB layout software - and who was not Mentor or Cadence. If we decided to upgrade our board design capabilities, they were on the list of suppliers we'd consider. Nothing about Zuken particularly grabbed our attention other than the assumption that they could help us bring some order to blank FR4 just as well as the next guy.
In Japan, however, Zuken was certainly not just one of the pack. In Japan, Zuken has had dominant market share for years. If you designed boards in Japan and used anything else, you just might be eyed with some suspicion. Zuken was founded in 1976 and has over a thousand employees worldwide, so they're hardly a new kid on the block, and they are a substantial EDA company by any measure. Being headquartered in Japan, however (and listed on the Tokyo Stock Exchange), they don't show up on radar quite the same way as most of the rest of the EDA industry.
The State of the Prototyping Game
As FPGAs have gotten larger and larger, the target audience for the biggest, baddest devices has grown smaller and smaller. These days, the audience has pretty much dwindled to a single group - those using FPGAs to prototype even larger systems. Engineering teams designing the biggest, most complicated SoCs need as many gates worth of prototyping as they can get - and the people developing software for those systems need to start well before the actual hardware is working.
The FPGAs for this type of work come almost exclusively from Xilinx and Altera. On the Xilinx side, the flagship is the gargantuan Virtex-7 2000T, a 6.8 billion (yep, with a B) transistor device with two million 4-input LUT equivalent cells. The device achieves its size by 2.5D interposer-based packaging (it’s actually 4 FPGA chips interconnected on a silicon interposer) using what Xilinx calls “Stacked Silicon Interconnect (SSI)” Technology. Altera’s biggest current prototyping-targeted device is the Stratix V E - which packs a respectable 1M equivalent 4-input LUTs on a monolithic device. Not content to have the second-biggest chip in town, however, Altera has already announced a 4-million cell device in their upcoming Intel-fabbed 14nm FinFET-based device.
Tools to Make Life Better
This week's Fish Fry is about tools. Not just any kind of tools - tools that can make your life better, your health stronger, and your job a little easier. First up, we check out how a team of researchers from MIT hopes to stem the tide of malaria with a new prototype device that can recognize the electrical properties of infected cells. Next, we chat with Shakeel Jeeawoody from Blue Pearl Software about how their tools can simplify the debug of your next FPGA design.
Do Commercial FPGA Tools Still Make Sense?
We’ve talked a lot in these pages over the last decade about FPGA design tools. If you’ve been following along in your readers, you know that there has been a big question mark over the commercial EDA industry as far as going after the FPGA design market. The question mark is there for good reason. The two dominant FPGA companies, Xilinx and Altera, have each made huge investments in proprietary FPGA design tools. And, while they have always made a bit of a show of partnering with commercial EDA vendors, they have competed so vigorously (particularly on price) with any third-party EDA attempt to crack into the core of their design flows that most EDA companies have kept a cautious distance from the FPGA market.
It’s easy to understand a lack of enthusiasm for FPGA from the point of view of the big EDA companies. If FPGA vendors are going to provide tools that compete with yours for - nearly free, why would you invest a lot building top-notch FPGA tools? It could be very difficult to recoup your investment. And, the company you’re relying on as a partner to build and test your tools is also your biggest competitor.
“Chips” are So Passé
The term “SoC” has been in use for about two decades now. Systems-on-Chip were a great idea, of course. Over the years, as we marched forward with Moore’s Law, steadily reducing the number of chips in our systems, we could see the finish line ahead of us somewhere. Eventually, we reasoned, this increased integration would allow us to put our entire system on a single chip. Sure enough, for many of us, our design elements dwindled from dozens to single digits, and ultimately approached that magical vanishing point - unity - one chip to rule them all.
Eventually, we rationalized victory. The marketers amongst us were all too excited to be the first to proclaim, “We are doing System on Chip!” Banners were waved and bandwagons opened their admission gates. We were no longer simply Chip designers, we were SoC designers! Strike up the band! The future is here! We are now in the SoC business!
The Modern Myth of Scheduling Engineering
OK, show of hands - who is currently working on a project that is behind schedule? (And, what are you doing here reading, then? Get back to work!) Project scheduling and estimating might be one of the most important skills that we are not taught in engineering school. In fact, our engineering school experience often leads us down a garden path that hinders our future ability to realistically schedule and estimate engineering projects.
After all, most engineering school projects are repeated and recycled year after year. Projects that consistently prove to be too difficult to finish within the boundaries of a school semester or quarter are culled from the curriculum, leading to an evolved repertoire of nicely-scoped, proven solvable problems for our budding engineers to tackle. We walk into class at the beginning of the term, read through a well-conceived requirements document, and enthusiastically embark on our three-month engineering adventure, confident that we’ll burn some midnight oil along the way, but equally secure in the notion that we’ll have working hardware on our lab bench and PowerPoint summary slides on our laptops come the end of the term.
Feedback Drives Design Evolution
Moore’s Law tells us that we should be able to double the number of transistors on a chip every couple of years. And, for about five decades, that has held mostly true. There are corollaries to Moore’s Law (that we have conveniently retrofitted as the years have passed) that say we should get some proportional increase in speed and improvement in power consumption as well. But, still considering all that, Moore’s Law is mainly about lithography - we can print things smaller and smaller on silicon, and we get lots of great benefits when we do.
Nothing in Moore’s Law says we’ll be able to do anything useful with all those transistors, however. It’s up to us, as engineers, to figure out how to take advantage of the bounty that Moore’s Law is giving us. At first, it was pretty easy. It didn’t take a lot of imagination or design savvy to get a few dozen, a few hundred, or even a few thousand transistors to work in concert doing something useful and interesting. As we got into the tens and hundreds of thousands, millions, and billions, however, engineering productivity became a serious problem - a serious problem, which, of course, gave birth to the EDA industry.
Particles, Coating, and Films
Ladies and gentlemen, hold on tight! We're getting into some serious semiconductor business in this week's Fish Fry. Have you ever wondered about the newest advances in nanoparticle coating technology? If so, you're in luck! My guest is Jon Brodd (CEO - Cima NanoTech) and we're going to talk about wet coating, nanoparticles, transparent conductive films, and trekking through the Himalayas. We'll also check out how one family of tiny FPGAs can solve four big real-world design problems.