MIPS Plants a New Family Tree

“Aptiv” Line of Processors: the Start of a New Generation

by Jim Turley

Blame BMW. Or maybe Sears, Roebuck & Co. The trend of classifying all your products into clearly defined low, middle, and high ranges has now extended its grasp to MIPS Technologies.

Carmakers figured out a long time ago that it would help sell cars if consumers could keep all the confusing model numbers straight. Thus, General Motors had its Chevrolet brand (low end), its Buicks (midrange), and its Cadillacs (high end). That branding strategy served the company quite well, even when all three cars were actually the same vehicle with different hood ornaments.

 

Power When You Need It

Aldec Harnesses Massive Server Capacity

by Kevin Morris

Warning! We are going to say the “C” word in this article. If you can’t take it, just stop reading now and save yourself a lot of heartache and grief. We know a lot of you are sensitive on this topic and have deep-rooted emotional issues about it. Our advice is to seek professional counseling.

For those of you who are less delicate (we assume you’re still reading), we proudly present a system that has the potential to accelerate your design verification efforts beyond anything you could currently achieve. You know how it goes. You do your initial debugging just fine with your local copy of your favorite HDL simulator, but then you reach a point in your project where you need to crank some serious vectors through that bad boy. That’s when it gets tricky.

 

Sensing 3D

FPGAs and The Next Generation of Cameras

by Amelia Dalton

Not much could be cooler than 3D video using FPGAs, right? Yeah, that's what I thought too, so in this week's Fish Fry, I chat with Niladri Roy of Lattice Semiconductor about some of the coolest video-related FPGA applications out there right now. Lattice is using FPGAs in some pretty creative ways in their new camera development kits, so if you're into video technology, you'll want to check out this week's interview. Ready... Goggles on... Go!

 

Kind Of A Big Deal

Xilinx Rebuilds Tools - From Scratch

by Kevin Morris

Let’s just start by saying that this is really a big deal.

I could come up with a lot of impressive numbers and comparisons to dazzle you with the size of the project Xilinx just publicly disclosed (although it’s been one of the worst-kept secrets in the FPGA market). In fact, Xilinx offered some sound bites to us right away - like “500 man-years of engineering effort.”

But that just doesn’t even begin to capture the scope of it.

 

On Your Mark

Achronix Gets Ready to Roll

by Amelia Dalton

In a special executive focus Fish Fry, this week I interview Achronix CEO Robert Blake about Achronix's new high-end FPGA family (based on Intel’s new 22nm Tri-Gate technology). Robert and I discuss why this new family may be a serious contender - going head-to-head with the most powerful FPGAs from the big guys. We also explore what their software tool story looks like, and why domain-specific hard IP may be the key ingredient in their secret sauce. Also this week, I am giving everyone another chance to win a MACHXO Pico Development Kit courtesy of Lattice Semiconductor, but you'll have to listen to find out how to win.

 

Staring Down Giants

Achronix Introduces New 22nm FPGAs

by Kevin Morris

It takes a lot of guts to go head to head with an established industry leader. It takes even more guts to go up against an established duopoly - directly in their most heavily fortified markets. Fighting against one giant is tricky. You have to look carefully to find a vulnerable spot and put all your energy into exploiting that vulnerability. Fighting against two different giants is a whole 'nother ballgame. What works against one opponent may not work against the other - and giants tend to be big and heavy. You don't want to get squished between them.

 

New Dimension in Chips

What 3D ICs Mean for the FPGA Industry

by Kevin Morris

3D is one of the hottest buzzwords these days. Every marketeer worth his salt is trying to find a way for the next “new thing” to be plausibly labeled as “3D.” 3D is cool. We see it in movies. The bad guys jump right out from the screen. 3D is real, vibrant, and immersive. 2D is, well, flat and boring.

When Tabula introduced their time-multiplexed FPGA fabric a few years ago, they proudly raised the 3D flag. Ahem, OK, so their chips aren’t EXACTLY 3D. Not in the physical sense. But, if you imagine the routing resources in a 3D projection of the 2D surface where each time step of the multiplexer reaches a different plane in the Z axis, you can plausibly... Well, you can plausibly say that “3D” was a marketing spin. Tabula’s chips are cool and innovative, but not really 3D.

 

Envisioning the Future

Embedded Vision Lunges Forward

by Kevin Morris

Last summer, we published an article welcoming the Embedded Vision Alliance to the world. With the incredible processing power available today - particularly when you consider the massive acceleration possibilities with devices like FPGAs and GPUs - real embedded vision becomes a realistic possibility. Making that possibility into reality, however, is an enormous task, requiring collaboration from dozens of companies and academia.

When we talk about embedded vision, we're not talking about just bolting a camera onto your embedded system. Devices that simply capture, reformat, record, or transmit video don't count. In order to count for our purposes here, your system needs to actually understand what it's seeing and do something useful with that information. When it comes to problem complexity, that's a whole 'nother kettle of fish.

 

Coming Back for Seconds

Design West 2012 Part Two

by Amelia Dalton

In this week's Fish Fry, I look into two ever-present themes at this year's Design West Expo: power and software. On the software side, I interview David Kleidermacher (Green Hills Software - CTO) about embedded security, virtualization, and even Green Hills's collaboration with Nintendo. On the power side, I chat with Infinite Power Solutions about energy harvesting and find out why they don't call themselves "Limited Power Solutions".

 

Solving the Big Secret

Synopsys Attacks SEUs in FPGAs

by Kevin Morris

A few years ago, one FPGA vendor, Actel, was quietly shouting in the corner. “Hey! Single event upsets (SEUs) are a big problem for FPGAs!”

The other FPGA companies replied with a thoughtful technical analysis of the situation: “Hey, Actel - SHUT UP!”

OK, maybe that’s not exactly the way it went down, but the idea is basically right. You see, Actel’s history is in super-high-reliability FPGAs for use in space. Up in space, there are lots of tiny particles flying around with a lot of energy. When one of those particles hits a vulnerable part of an IC (like a storage element of some kind), it can flip the bit from one to zero or zero to one. As your razor-sharp digital design mind might be telling you right now, this is really bad.

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