FPGAs Cool Off the Datacenter

Xilinx Heats Up the Race

by Kevin Morris

The problem is programming.

If it were just a straight-up race to see what kind of chip delivers the most processing for the least power, FPGAs would have won long ago. A custom hardware version of just about any algorithm you can name, carefully optimized for FPGA LUT fabric, will run much faster, with less latency and far less power, than anything you can do with any conventional processor.

But what about GPUs?

Yes, that includes GPUs - especially the power part. And these days, it’s getting more and more to the point that power is the ONLY part. In big-iron computing applications such as large datacenters, you could always add more cores, servers, or processors. But you can’t add more processing if you can’t pipe more power into the building or get more heat out. Many datacenters are running up against exactly that issue right now. That’s why you see huge server farms constructed where power is cheap and abundant. And, for the companies that need giant server farms, power is usually the largest business expense.  Read More


latest news

November 19, 2014

Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping Kits for 10 Interface Protocols

Over 15,000 Microsemi Space Products Deployed on 10-year-long Rosetta Spacecraft Mission

November 18, 2014

Xilinx Demonstrates All Programmable Solutions for Industrial Automation Applications at SPS/IPC/Drives 2014

November 17, 2014

New Dual Wideband Transceiver from VadaTech in FMC Format

Nallatech Collaborates with OpenPOWER Foundation Members IBM and Altera to Launch Innovative CAPI FPGA Accelerator Platform

Xilinx Announces SDAccel Development Environment for OpenCL, C, and C++, Delivering Up to 25X Better Performance/Watt to the Data Center

Nallatech to Demonstrate FPGA Acceleration at SC14

Altera and IBM Unveil FPGA-accelerated POWER Systems with Coherent Shared Memory

November 14, 2014

Get Powered Up with the Updated Mouser Solar Power Technology Site

Xilinx and its Ecosystem Showcase Compute, Storage, and Networking Acceleration for Data Center and HPC Applications at SC14

Xilinx Announces Industry's First Low Latency 25G Ethernet IP for FPGAs to Address Throughput Challenges in Data Center Applications

November 12, 2014

Plunify’s InTime Design Optimization Software Supports Altera FPGAs and SoCs

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November 11, 2014

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FPGA News Archive

Build Your Own RTOS in 30 Minutes

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by Jim Turley

No Moore for MEMS

Sensors Stay Steady

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Mentor Elevates PCB Game

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FPGA Article Archive

 

Editors' Blog

QuickLogic’s Next Sensor Hub Rev

posted by Bryon Moyer

QuickLogic released a new version of their ArcticLink 3 sensor hub (7-Oct)

QuickLogic Goes Wearable

posted by Bryon Moyer

QuickLogic has announced a wearable version of their sensor hub technology. How much does it differ from what we’ve seen in the past from them? (24-Jul)

Improved FPGA Tool Results

posted by Bryon Moyer

Plunify tries to get the best out of FPGA design tools (21-Jul)

On the Scene: Project Ara

posted by Amelia Dalton

The race hasn't yet begun. In fact, we're not even on the starting block, but the rule book for this race - the race to the next major innovative mobile platform (smartphone) has been drafted and teams are starting to assemble. Google's Project Ara, the world's first completely modular smartphone is coming, and the modules will be designed by... YOU! On your mark. Get set. Design! (21-Apr)

Moving Back to Software

posted by Bryon Moyer

TI’s new substation collaboration allows a software solution to replace hardware – the reverse of what typically happens as a market matures. What’s up with that? (9-Apr)

FPGA Editors' Blog Archive

 

forum

A Sale of Thirty-Two Bitties

Posted on 11/19/14 at 3:08 PM by WEATHERBEE

My suggestion: Dump the uncompetitive x86 and commodity ARM plans and focus on GPGPU and high-performance computing.

A Sale of Thirty-Two Bitties

Posted on 11/19/14 at 2:09 PM by TotallyLost

TotallyLost
I've done a couple server designs around Intel Xeon products, and while general documentation is easy to access with NDA, unless there are serious sales numbers behind the design, it's difficult to get additional support or docs.

AMD has been even a bi…

Build Your Own RTOS in 30 Minutes

Posted on 11/19/14 at 12:41 PM by ericverhulst

Just from SynthOS website:
- "Interrupts are supported. System used forced cooperation for multitasking rather than pre-emption."
Then look at the figures for interrupt latency, context switch time, etc.
=> pretty slow compared to any other embedded RT…

Managing Encryption

Posted on 11/17/14 at 10:33 AM by bmoyer

bmoyer
Does HCC Embedded's way of managing encryption strike the right balance between centralization and flexibility?

FPGA Forum Archive

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