Synopsys Says You Don't Have to Wait for Software
Nobody wants to wait these days.
Unless it’s a surprise moment in a thrilling movie, we want it now.
Didn’t you get my tweet? You haven’t re-tweeted yet? What? You’re busy on your design project and can’t be interrupted? Dude! That’s so 20th century! Look at meeee!
Um, hello… I’m your customer; I pay your salary, OK? So? Did you see my email? No? Why? Sleeping? No excuse, even if it is 2 AM in your time zone. There is no forgiveness for not immediately attending to my needs. Now.
Fish Fry - February 25, 2011
In Fish Fry this week, Amelia researches the grooves of the most expensive (and awesome) turntable ever built, examines the reality of audio IP in today’s consumer-driven market and checks out some groundbreaking tunes created by a robot. Also this week, she offers up yet another fantastic nerdy giveaway.
A look at the world of audio IP
Humans have always communicated by sound. It’s so basic that we take it for granted, whether in our telephones or our stereo systems. By contrast, we fawn and ooh and ah over video. High def this, low power that. Let’s see if we can get a bazillion pixels on a 1-cm x 1-cm screen. OK, no one can see that small, but hey, we can say we did it!
So you’d be forgiven for thinking that all that’s happening in audio is finding new ways to compress files in a lossy manner so that you can fit a bazillion tinny-sounding songs on a media player (instead of just a paltry billion).
Cadence PDN Tool Tames Tricky Power Networks
When doing a digital design, the power network is the last thing you want to worry about. It can’t be that difficult, right? You got your power and your ground and some big ‘ol FR4 acreage with nothing but copper as far as the eye can see...
Well, nothing but copper and a few vias, actually. Oh, and this part here where it gets narrow - and this part over here where there seems to be some nasty resonant frequency that drops the output... Wow, our circuit totally doesn’t work. What’s the deal?
“Danger, danger, Will Robinson!”
Cue the synthesized theme music and wave your arms. It’s another episode of Android Development Hour!
This week we follow the exciting exploits of Captain Power and his legion of silicon-based life forms. Behind the scenes, Captain Power has formed an alliance with the Android, the all-powerful operating system launched from planet Googleplex. The Android is barely two years old, but already it’s dominating vast segments of the galaxy. Mobile handsets are especially vulnerable, a sector expanding so fast it’s turning blue.
Taming the Task of FPGA Design Support
It would be easy to write off Tabula’s announcement that their Stylus FPGA design tool suite will be exclusively available via a cloud-based service as just trying to be with the “in” crowd. However, no matter how over-used “in the cloud” may seem as a software-delivery buzzword right now, delivering a full-fledged FPGA design tool flow exclusively in the cloud is actually uncharted territory at this point in the industry.
Tiempo Lets Things Happen When They're Ready to Happen
Hawaii is a different beast.
It may be part of the US, but things operate with mindset unfamiliar to the typical go-go American, as you’ll immediately discover when waiting to get your rental car.
They refer to it quaintly as “Aloha time.”
For instance, the caterer is supposed to set up at 1 PM. By 2 PM no one as showed up yet. Explanation? “They’re on Aloha time.” Now, this is a problem only if the party is due to start at 2 PM. If, on the other hand, the party is going to start, well, when the party is ready to start, then it doesn’t really matter. Just relax, grab a little refreshment, and let things take care of themselves.
Fish Fry - February 11, 2011
In Fish Fry this week, Amelia explores the EDA landscape and attempts to discover what the future will hold for the industry. She investigates a new one stop shopping method of marketing in the FPGA world and she also delves into the historical importance of engineering pioneer Ken Olsen. Also this week, Amelia checks out a new truly unique breakthrough in medical technology and awards yet another winner in her series of nerdy giveaways.
How to Detect Devices Drawing the Life Blood Out of Your Design
Lurking unseen in CMOS designs, unintended devices may be drawing current. As multiple power domains become common, it’s more likely that unintentional forward-biased diodes are introduced in the design. Forward-biased diodes also can be introduced by circuit design errors or layout design errors in complex circuitry such as digital circuits that contain pass gates and analog circuits.
Altium Designer 10 Kicks Some Serious Sand
Ask someone who sells PCB software for Cadence or Mentor Graphics how often they end up competing with Altium for design seats, and you’re likely to get an answer something like, “Way more often than we’d like.” There is a good reason for this. Altium (formerly ProTel) has been biting the ankles of the big EDA companies, causing trouble for a couple decades on the low-end of board design tools, and, more recently, they’ve been gnawing their way up from the ankles to places where it starts to actually hurt.
Back in the ProTel days, the tools were the working-man’s PCB software. If you weren’t into investing a small fortune in complex workstation-based board design tools, you could snap up a copy of ProTel for a pittance, fire it up on your PC, and do everything you needed to do - without having to hire a CAD department or take out a loan. In recent years, Altium has morphed their tool suite into a complete, integrated solution for electronic product design - including hardware and software.
Is Variation a Real Issue for Designers?
A couple years ago, the raging topic was DFM, with a heavy focus on litho issues. Curiously enough, part of the conversation consisted of the question, “Is there anything to this DFM stuff, or is it just a bunch of hype?”
The suggestion was that DFM was all about tools guys selling you stuff on the promise that it would help, with you having no real way to prove whether or not it was helping. (No one is going to go through a complete project twice, once with DFM tools and once without them as a control.) So the question was, do users really care about this?
Fish Fry - February 4, 2011
In Fish Fry this week, Amelia checks out DesignCon at the Santa Clara Convention Center, interviews Brad Griffin from Cadence about Power Distribution Networks and tries to find out why FPGAs are such bad team players when it comes to board design. Also this week, Amelia answers questions from loyal listeners and offers up another fantastic nerdy giveaway.
Imagine you’re a private detective and someone hands you a picture. In that picture you see a slim young man in a bathing suit holding a surfboard. The board is plain, marked only with some sort of symbol like a sloppy A within a circle feature. He has dark hair cut into a mohawk, peaked with gel, tinted red at the ends. He’s got a reasonable tan working. Your job is to find this guy. Somewhere in the US. (Let’s assume for the sake of keeping it simple that the guy will be staying put – you won’t be chasing a moving target.)
Xilinx Acquires AutoESL
In 1995, I strutted my marketing suit onto the stage at the Design Automation Conference and told the world that a revolution was afoot. I had seen the light - the path to engineering enlightenment, the road to the future of design - and I wanted to share. No longer would designers have to toil and struggle with the arcane anachronisms of register-transfer-level descriptions and clock-accurate timing. Now, thanks to the amazing capabilities of high-level synthesis, thousands of lines of detailed and incomprehensible RTL would be replaced by a few elegant lines of ordinary C or C++, with clear and self-explanatory loops and conditionals, that would magically be transformed and re-transformed into whatever hardware
There’s a battle shaping up as yet another entrant into the assertion synthesis field makes some noise this week.
We’ve kept an eye on assertion synthesis over the last year or so. Tools and methodology vendors lament that assertion-based verification has been slow to catch on. Some say that’s because it’s too hard to generate and work with assertions. Hence tools to make that easier.
Last summer we reported on NextOp’s entry into the fray. We also noted that their approach was qualitatively different from that of another player, Zocalo, in that Zocalo enables assertion synthesis before the design is done; NextOp generates assertions from RTL already written.