Improving Embedded Software Integration

Combining Emulation and Offline Debugging

by Tomasz Piekarz and Joe Rodriguez (Mentor Graphics)

Today’s system-on-chip (SoC) designs are increasingly dependent on firmware and device drivers given the challenges of controlling various components (including the microcontroller, microprocessor or DSP cores, peripherals and interfaces). Accordingly, leading semiconductor companies are working to integrate software development and validation with silicon design and verification. One obstacle to such integration is the difficulty in effectively debugging early-stage embedded software. In this article we describe a way around this obstacle by way of a new software debugging methodology for software and system-level integration.


There Goes the Neighborhood

Zuken Redesigns their Board Tools from Scratch

by Bryon Moyer

Anyone who’s ever done any serious remodeling of their home knows the big decision. At some point, wouldn’t it really be easier just to mow down the existing structure and start over?

Little by little, as you add new ideas – “while you guys are at it” – the costs mount, and that’s even without considering the surprises that are inevitably encountered. And if you go from a two-dimensional home – one story – and add a third dimension, it gets crazier. Most single-story homes aren’t built strong enough to support a second story. So you end up doing things like building a separate support framework to hold up the new top floor or, even more crazily, hoisting the original house up to make it the top floor and then building a new first floor under it. (Yes, people do this.)


Where is EDA Going?

by Dick Selwood

In 1999, DAC (the Design Automation Conference) was in New Orleans. The industry was at the height of its growth, and, when you got off the plane, it looked as though at least a third of the cabs had illuminated Synopsys advertisements on their roofs. There were almost 250 exhibitors, many of them recent start-ups, and it took forever to get from the show booths to the demo booths. In the evening, DAC vendor parties were everywhere, and, despite the humidity and heat, it was a wonderful time to hear about new ideas.


ARM TechCon Shakedown

Tools, IP and Processors, Oh My!

by Amelia Dalton

ARM TechCon was a hip and happenin' show this year and I've got the interviews to prove it. This week I interview Tony Xia and Amit Bhojraj from NXP Semiconductor about their new 49 cent 32-bit microcontroller and why they were encouraging designers to dismantle, maim and otherwise destroy their old 8- and 16-bit development boards. From the tool side of the ARM community, I also interview Thomas Sporrong from IAR Systems about the newest version of the IAR Embedded Workbench and how IAR's acquisition of Signum Systems expanded their already wide range of tool offerings.


Bringing the Good News from Leuven

by Dick Selwood

It is strange sitting indoors on a grey wet day in Belgium -- and Belgium does pretty good grey and wet in October -- listening to people talking about photovoltaic cells. But then imec, in Leuven, Belgium, is a pretty strange place.

When Bryon wrote about imec earlier this year, he commented that, even with the steady stream of press releases, it was difficult to get a handle on what the organisation actually does.


IP of Providence

Altera Boosts Video Analytics

by Kevin Morris

The age of intelligent video is upon us. We’ve all played with the new Kinect devices from Microsoft. We’ve read about lane departure and collision avoidance systems being integrated into cars. We’ve heard about technologies like facial recognition being used in security applications. No longer are we content to stream “dumb” video from place to place. While the master control room with giant arrays of video feeds may make a compelling image for science fiction, the reality will be more like a giant array of cameras - and a very small number of monitors - showing us only the things that actually deserve our attention.


Rockin' and Rollin' EE Style

Vennsa’s Debug Technology and Fish Fry Secrets Revealed

by Amelia Dalton

In this week’s Fish Fry, I interview Andreas Veneris (CEO - Vennsa Technologies) and Sean Safarpour (CTO - Vennsa Technologies) about the history of debug and how exactly Vennsa fits into the big picture of design automation. I also investigate how the University of California Riverside is looking to re-invent electronic computation, and I reveal five things you may not know about Fish Fry. I also have another gift certificate to give out this week, but you'll have to listen to find out how you can win.


Off Script

Springsoft Provides Access to More Data

by Bryon Moyer

At times it’s seemed a sotto-voce religious war.

One side says that a clean user interface aids productivity. The other side says that, well, quite frankly, a graphic user interface (GUI) is a toy, not meant for serious work.

One side says that command-line work is the only real way to do things; the other makes the accusation of engineers trying to keep things obscure and difficult as a form of job security.


What the Heck is FEC?

Focused Expression Coverage Explained

by Ray Salemi

When you think about it, simulating your FPGA is a lot like exercising on a treadmill. You do both of them because you want to avoid bad consequences. Some people seem to like doing it, though you might not see it that way. And you may or may not yet have seen the positive consequences in your life.

In both the case of the treadmill and of FPGA simulation, the biggest question in your mind is "When can I stop?" This is a tougher question for simulation because you don't have a sadistic trainer who makes you keep going.


What “Is” Is

Terms May Not Mean What You Think They Mean

by Bryon Moyer

We’ve created a special domain for legal issues in this country. If it looks like a lawyer might have to get involved, the rest of us steer clear and know better than to try to make sense of things. Even if we understand the words, we might not understand what they mean when they’re used together in a paragraph or document. And, even if we do, it still might not make sense.

But we don’t seem to mind: whatever… leave it to the lawyers. As long as they’re happy…


A Bear, a Transistor and a Process Node Walk Into a Bar

by Amelia Dalton

In this week's Fish Fry, I interview James Wang (SmartBear Software - Vice President) about the age old gap between hardware and software designers and how SmartBear's tool suite can help bridge that divide. Also this week, I check in on Samsung's progress on 20nm process node and investigate how the National Science Foundation is trying to make the transistor obsolete. I have a DE0-Nano Development Board to give out this week, but you'll have to listen to find out how you can win.


(un)Rolling with the Times

by Brad Dixon and Anil Khanna, Mentor Graphics

A HW engineer and an embedded SW developer, who are slated to work together on a common project, strike up a conversation at the proverbial water cooler.

HW guy: “I just finished a month long evaluation for a new co-verification tool. We finally made a decision on the product and vendor we’re going with.”

SW guy (nonchalantly): “Really? I wouldn’t know much about evaluations, I build my own toolchain.”


When Programmers Rule the World

The Talent Pool Determines the Design

by Jim Turley

“Their talents did not quite run to scholarship.”

This was Susanna Clarke’s polite way of describing a pack of idiots. Or more charitably, people who were perhaps in over their heads. Swimming out of their depth, one might say.

We’ve all encountered this type of person at work. Conveniently, they often wear neckties so that we can spot them from a long way off. But even credentialed engineers can wade in over their heads, meddling in technical areas where their aptitude does not entirely correlate with their ambition.


All You Can Eat: A Bountiful Buffet of EE

Ivo Bolsens Talks Programmable Platforms, Kilopass v. Sidense, and The World's Smallest Motor

by Amelia Dalton

In this week's Fish Fry, I've got a bountiful buffet of EE beauty for you to sink your teeth into. I interview Ivo Bolsens (CTO and Senior Vice President - Xiinx) about the changing nature of FPGA design wins and why Xilinx is banking on its Zynq platform to transform the industry as we know it.

Also this week, I check in on the recent rounds of litigation between non-volatile memory IP suppliers Sidense and Kilopass and I dig into the details of the world's smallest motor.

I have a Spartan-6 LX9 Microboard to give out, but you'll have to listen to find out how to win.


Cell-Aware Fault Models for IC Production Test Outperform Gate-Exhaustive Fault Models

by Friedrich Hapke (Mentor Graphics) and Stefan Eichenberger (NXP)

Physical defects within ICs, such as shorts and opens, can occur during manufacturing at any step along the fabrication process because of the complexity of modern CMOS technology nodes. The conventional approach to test for these physical defects includes structural tests using classical fault models such as stuck-at (SA), bridging [1,2], and transition faults [3]. This approach has efficiently addressed defects between standard cells and defects at input and output ports of library cells.

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