The Intel/ARM Agreement is a Smaller Deal Than It Sounds
You don’t often see the names “Intel” and “ARM” used together in a sentence without words like “rival” or “competitor” in between them. They’re like oil and water, cats and dogs, Dodgers and Giants.
But, just this week, we saw the lion lie down with the lamb. What’s this? Intel and ARM are working together? Intel will be making ARM processors? It’s the end of the world as we know it!
How is Your Register Behaving?
Registers: It’s a dirty job but someone has to do it. In this week’s Fish Fry, we take a closer look at register behavior modification and sequence automation with Anupam Bakshi of Agnisys. Anupam and I also discuss design intent and the future of verification intent. Whether we like it or not, we all need a little help sometimes, right? In the second part of our EDA special, we welcome Bob Smith from the Electronic System Design Alliance. Bob and I discuss how the ESDA is helping facilitate IP fingerprinting and 3D system scaling, as well as bridging the gap between hardware and software in embedded system design.
Expediting System Design
Respin! Respin! Respin! Are you afraid yet? For three decades, the electronic design automation (EDA) industry has relied on that fear. They learned way back in the 1980s that the quickest path to the biggest budget when selling software tools was through fear of the dreaded, career-limiting IC design respin. Want to sell me something that makes my engineers more productive or my designs more optimal? Meh… Maybe. Want to sell me something that prevents me from taking the blame for a respin on my project? How much money do you need?
SiFive Leverages Open-Source RISC-V for Customizable Compute Platforms
Makers are the epitome of what big chip vendors used to consider a waste of time for their valuable salesfolk. “Fred in the shed,” as they said. No volume, no ROI. “Stick with Tier 1s.”
But you Makers are now in demand, given that you’re particularly good at things required for Internet of Things (IoT) types of systems, taking readily-available platforms and making them do cool things – things that larger companies are now more interested in; things that could potentially sell in high volumes. I don’t know whether chip guys are now selling to Makers, but Makers have definitely been courted with more platforms (hardware and software) and tools for getting, at the very least, proofs of concept out the door quickly.
What’s Next After Moore’s Law
The EDA industry has always been a bit of an enigma. On one hand, EDA has provided the essential technology that has enabled Moore’s Law to proceed for half a century. Without the incredible accomplishments of EDA’s engineers, today’s multi-billion transistor marvels would never have had the chance to exist, and their world-changing capabilities would never have seen the light of day.
Yep, that’s right. I’m saying that without EDA we would not have Pokemon Go.
IoT, FinFETs, and the Tools We Need
The air is a perfect 72 degrees. The water is calm for now, but breakers dot the horizon. The time for the next mondo wave isn't here now, but it will be soon. In this week's fish fry, we're surfing our way to the next big computational wave with a little help from David Dutton (CEO - Silvaco) and Lisa Minwell from eSilicon. David and I discuss why we will see a lot more design requirements coming out of middle nodes, why on-board power will be more important than ever before, and a little bit about why our design tools will be the key to our future success in IoT. In the second half of our episode, Lisa Minwell and I chat about the components of a successful IP company and where 2.5D (and 2.1D) designs will find their foothold in the future.
ProPlus Claims to Do Full SPICE Faster than Fast
Years ago, my brother was visiting relatives in Austria. As the story goes, the family was aristocratic once upon a time, and, while that didn’t devolve into riches and status (or even awareness of that fact) for my family, it was still part of the relatives’ mindset. Which gave them a sense of entitlement and “natural” superiority.
So when my brother was describing the California climate, within which he had lived for most of his life, and where you go from, oh, say, April through October without rain – a climate distinctly different from central Europe, he got a simple response: “Not possible.” And that was that. No amount of data or convincing would get them to believe such nonsense.
It is Too Early to Tell
In the last few days, I heard that Garrison Keeler will no longer be intoning, "It has been a quiet week in Lake Woebegone…" He is retiring. Yes, even in Europe we have heard the Prairie Home Companion, and here in Britain none of the last few weeks have been quiet weeks.
The story goes that Zhou Enlai, the Chinese Communist Leader, when asked about the impact of the French Revolution, said, "It is too early to say." The myth-busting wisdom is that he was talking not about the storming of the Bastille in 1789 and the subsequent events, but the student events of 1968. However, the statement does encompass a great deal of historical wisdom: in particular, we should not rush to predict the consequences of events. Yet there is no shortage of people prepared to rush to judgement on the web within seconds of an event, whether or not they are fully informed.
Engineering the Second Generation
Somewhere, in a nondescript cubicle in building number umpteen of a multi-billion-dollar multinational multi-technology conglomerate, an engineer sits at a lab bench staring at an eye diagram on six-figure scope. It’s the same every day. Any time he is not in a meeting or writing a status report, he sits in this lab and eats and breathes signal integrity. He has almost no concept of the end product that will incorporate his work. His entire universe is jitter, pre-emphasis, equalization, noise, amplitudes, and bit-error rates. For him, time stands still - in the picoseconds.
Verific Language Parsers and Your Startup Success
Filed under “Don’t Try This at Home” or “Not to be Taken Lightly”, most EDA engineering teams don’t even consider building their own language front end. Most of you will know the name Verific and some probably have used their language parsers a time or two (or twenty), but many of you may not know that Verific also has a robust and comprehensive startup program. In this week’s Fish Fry, Rick Carlson and I chat about how your startup can stand out from the crowd with a little help from Verific. Rick also shares with us some Verific-assisted startup success stories and explains why the giraffe is Verific’s signature giveaway.
Photonics May Be the Next Big Thing
“Begone, Prince of Insufficient Light!” -- Dogbert
Imagine describing electronics, and electrons, to an 8-year-old. “Electrons are really tiny little particles that move through the wires, see? And they can turn switches on and off, and do stuff, and… uh… perform magic tricks.”
Synopsys TCAD and Coventor Start to Overlap
Astronomy bestows lavish breathless anticipation upon one of the great events of the universe: two galaxies running into (or through) each other. The thing is, it happens breathtakingly slowly – each stately galaxy spinning away, the distance between them slowly evaporating. Watching it is something of a sampling exercise: see where they are; nap for a couple of centuries. Wake, see that, yup, they’re a little closer; nap. Wake again, grab a new beer, and doggonnit if they aren’t just a wee bit closer yet. Basketball it’s not.
Well, we may have something of a similar event in play in EDA-land. Although referring simply to two galaxies isn’t quite fair: one, Synopsys, is perhaps more of a galaxy cluster to Coventor’s galaxy. To set the scene, let’s examine the status quo – the gap between the companies – and then we’ll look at each one to see how that gap is closing. And we’ll hopefully do it in a way that doesn’t involve napping.
Mentor PADS Expands Scope
For decades, the various companies who market printed circuit board (PCB) design software had it all wrong. The products available to us were defined not by what the customers actually needed, but by how the EDA companies could maximize revenues. The issue was this: smaller companies and individuals needed capable PCB design tools at a price they could afford. Giant corporations needed cutting-edge capabilities - at just about any price.
Hard IP, eFPGAs and the Moore's Law Bottleneck
What if you could have your FPGA cake and eat it too? What if you could modify your RTL post-production and have several variations of an algorithm on the same chip? Let me introduce you to eFPGAs. Yoan Dupret from Menta joins Fish Fry this week to discuss the details of Menta’s eFPGAs, the benefits of embedding field programmable gate array fabric as an IP core, and what process geometries are supported by Menta's eFPGAs. Also this week, Fish Fry welcomes Ramy Iskander from Intento. Ramy and I chat about the challenges of tools in the analog world and how Intento is working on fixing the “Moore’s Law Bottleneck”.
SeaScape for SeaHawk and Other Tools to Come
Hey there! Well it looks like you’ve just launched a full-chip analysis of your project, so… well, you’re gonna have some time on your hands. While you’re awaiting results, let’s talk about some ways that we might reduce that spare time (assuming that you’re not counting on that spare time for getting other things done – or just relaxing).
EDA has always struggled with run times. And that’s because EDA tools have a huge job, taking big designs (some might not seem big today, but in their day, they were) and identifying problems or optimizing or whatever in a timeframe that seems long when it comes to sitting around waiting for results, but is still far faster – and more accurate – than a human (or a bunch of humans) could do.